dsp56800eerm Freescale Semiconductor, Inc, dsp56800eerm Datasheet - Page 16

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dsp56800eerm

Manufacturer Part Number
dsp56800eerm
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Part 2 Signal/Connection Descriptions
2.1 Introduction
The input and output signals of the 56F8357 and 56F8157 are organized into functional groups, as detailed
in
present on a pin.
16
Table 2-1
1. If the on-chip regulator is disabled, the V
2. Alternately, can function as Quad Timer pins
3. Pins in this section can function as Quad Timer, SPI #1, or GPIO
Power (V
Power Option Control
Ground (V
Supply Capacitors
PLL and Clock
Address Bus
Data Bus
Bus Control
Interrupt and Program Control
Pulse Width Modulator (PWM) Ports
Serial Peripheral Interface (SPI) Port 0
Serial Peripheral Interface (SPI) Port 1
Quadrature Decoder Port 0
Quadrature Decoder Port 1
Serial Communications Interface (SCI) Ports
CAN Ports
Analog to Digital Converter (ADC) Ports
Timer Module Ports
JTAG/Enhanced On-Chip Emulation (EOnCE)
Temperature Sense
Dedicated GPIO
and as illustrated in
DD
SS
or V
or V
DDA
SSA
1
& V
)
)
PP
Functional Group
Table 2-1 Functional Group Pin Allocations
2
3
Figure
56F8357 Technical Data, Rev. 15
CAP
2-1. In
pins serve as 2.5V V
2
Table
2-2, each table row describes the signal or signals
DD_CORE
power inputs
56F8357
Number of Pins in Package
24
16
10
26
21
9
1
7
6
4
6
4
4
4
4
2
6
5
1
Freescale Semiconductor
56F8157
24
16
10
13
21
9
1
7
6
4
6
4
4
4
4
2
5
7
Preliminary

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