dsp56800eerm Freescale Semiconductor, Inc, dsp56800eerm Datasheet - Page 125

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dsp56800eerm

Manufacturer Part Number
dsp56800eerm
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
The value of the JTAG FM_CLKDIV[6:0] will replace the value of the FM register FMCLKD that divides
down the system clock for timed events, as illustrated in
PRDIV8 bit, and FM_CLKDIV[5:0] will map to the DIV[5:0] bits. The combination of PRDIV8 and DIV
must divide the FM input clock down to a frequency of 150kHz-200kHz. The “Writing the FMCLKD
Register” section in the Flash Memory chapter of the 56F8300 Peripheral User Manual gives specific
equations for calculating the correct values.
Two examples of FM_CLKDIV calculations follow.
EXAMPLE 1: If the system clock is the 8MHz crystal frequency because the PLL has not been set up,
the input clock will be below 12.8MHz, so PRDIV8 = FM_CLKDIV[6] = 0. Using the following equation
yields a DIV value of 19 for a clock of 200kHz, and a DIV value of 20 for a clock of 190kHz. This
translates into an FM_CLKDIV[6:0] value of $13 or $14, respectively.
EXAMPLE 2: In this example, the system clock has been set up with a value of 32MHz, making the FM
input clock 16MHz. Because that is greater than 12.8MHz, PRDIV8 = FM_CLKDIV[6] = 1. Using the
following equation yields a DIV value of 9 for a clock of 200kHz, and a DIV value of 10 for a clock of
181kHz. This translates to an FM_CLKDIV[6:0] value of $49 or $4A, respectively.
Once the LOCKOUT_RECOVERY instruction has been shifted into the instruction register, the clock
divider value must be shifted into the corresponding 7-bit data register. After the data register has been
Freescale Semiconductor
Preliminary
JTAG
Figure 7-1 JTAG to FM Connection for Lockout Recovery
SYS_CLK
2
FM_CLKDIV
150[kHz]
150[kHz]
FM_ERASE
56F8357 Technical Data, Rev. 15
<
<
(
(
FMCLKD
SYS_CLK
clock
SYS_CLK
input
(DIV + 1)
(DIV + 1)
(2)(8)
(2)
7
Flash Memory
)
)
Figure
<
<
7
200[kHz]
200[kHz]
7-1. FM_CLKDIV[6] will map to the
DIVIDER
7
Flash Access Blocking Mechanisms
125

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