dsp56800eerm Freescale Semiconductor, Inc, dsp56800eerm Datasheet - Page 39

• Manufacturer Part Number: dsp56800eerm
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

Part 3 On-Chip Clock Synthesis (OCCS)
3.1 Introduction
Refer to the OCCS chapter of the 56F8300 Peripheral User Manual for a full description of the OCCS.
The material contained here identifies the specific features of the OCCS design.
specific OCCS block diagram to reference from the OCCS chapter of the 56F8300 Peripheral User
Manual.
3.2 External Clock Operation
The system clock can be derived from an external crystal, ceramic resonator, or an external system clock
signal. To generate a reference frequency using the internal oscillator, a reference crystal or ceramic
resonator must be connected between the EXTAL and XTAL pins.
3.2.1
The internal oscillator is also designed to interface with a parallel-resonant crystal resonator in the
frequency range specified for the external crystal in
is shown in
Freescale Semiconductor
Preliminary
CLKMODE
Crystal Oscillator
EXTAL
Figure
XTAL
3-2. Follow the crystal supplier’s recommendations when selecting a crystal, since
Crystal
OSC
Prescaler
÷ (
PLLCID
1,2,4,8
Figure 3-1 OCCS Block Diagram
)
56F8357 Technical Data, Rev. 15
x (1 to 128)
Detector
PLLDB
Lock
PLL
Reference
Detector
Loss of
Clock
F
OUT
Table
Prescaler CLK
÷
Bus Interface & Control
2
10-13. A recommended crystal oscillator circuit
F
OUT/2
PLLCOD
Loss of Reference
Postscaler
÷ (
Clock Interrupt
1,2,4,8
)
LCK
Postscaler CLK
ZSRC
SYS_CLK2
Source to SIM
Figure 3-1
Interface
Bus
shows the
Introduction
39