dsp56800eerm Freescale Semiconductor, Inc, dsp56800eerm Datasheet - Page 37

• Manufacturer Part Number: dsp56800eerm
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

Freescale Semiconductor
Preliminary
(GPIOE10)
(GPIOE11)
(GPIOE12)
(GPIOE13)
RESET
Signal
RSTO
Name
IRQA
IRQB
TD0
TD1
TD2
TD3
Table 2-2 Signal and Package Information for the 160-Pin LQFP and MBGA
129
130
131
132
Pin
No.
65
66
98
97
Ball No.
D10
B10
A10
E10
J14
J13
K9
P9
Schmitt
Schmitt
Schmitt
Schmitt
Output
Output
Output
Input/
Input/
Type
Input
Input
56F8357 Technical Data, Rev. 15
enabled
enabled
enabled
During
pull-up
pull-up
pull-up
Output
Reset
Input,
Input,
Input,
State
TD0 - 3 — Timer D, Channels 0, 1, 2 and 3
Port E GPIO — These GPIO pins can be individually
programmed as input or output pins.
At reset, these pins default to Timer functionality.
To deactivate the internal pull-up resistor, clear the appropriate
bit of the GPIOE_PUR register. See
External Interrupt Request A and B — The IRQA and IRQB
inputs are asynchronous external interrupt requests during
Stop and Wait mode operation. During other operating modes,
they are synchronized external interrupt requests, which
indicate an external device is requesting service. They can be
programmed to be level-sensitive or negative-edge triggered.
To deactivate the internal pull-up resistor, set the IRQ bit in the
SIM_PUDR register. See
Reset — This input is a direct hardware reset on the
processor. When RESET is asserted low, the device is
initialized and placed in the reset state. A Schmitt trigger input
is used for noise immunity. When the RESET pin is
deasserted, the initial chip operating mode is latched from the
EXTBOOT pin. The internal reset signal will be deasserted
synchronous with the internal clocks after a fixed number of
internal clocks.
To ensure complete hardware reset, RESET and TRST should
be asserted together. The only exception occurs in a
debugging environment when a hardware device reset is
required and the JTAG/EOnCE module must not be reset. In
this case, assert RESET but do not assert TRST.
Note: The internal Power-On Reset will assert on initial
power-up.
To deactivate the internal pull-up resistor, set the RESET bit in
the SIM_PUDR register. See
Reset Output — This output reflects the internal reset state of
the chip.
Signal Description
Part 6.5.6
Part 6.5.6
for details.
Part 6.5.6
for details.
for details.
Signal Pins
37