dsp56800eerm Freescale Semiconductor, Inc, dsp56800eerm Datasheet - Page 49

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dsp56800eerm

Manufacturer Part Number
dsp56800eerm
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
4.7 Peripheral Memory Mapped Registers
On-chip peripheral registers are part of the data memory map on the 56800E series. These locations may
be accessed with the same addressing modes used for ordinary Data memory, except all peripheral
registers should be read/written using word accesses only.
Table 4-9
Peripherals are listed in order of the base address.
The following tables list all of the peripheral registers required to control or access the peripherals.
Note: Features in italics are NOT available on the 56F8157 device.
Freescale Semiconductor
Preliminary
X:$FF FFFD
External Memory Interface
Timer A
Timer B
Timer C
Timer D
PWM A
PWM B
Quadrature Decoder 0
Quadrature Decoder 1
ITCN
ADC A
ADC B
Temperature Sensor
SCI #0
SCI #1
X:$FF FFFE
X:$FF FFFF
summarizes base addresses for the set of peripherals on the 56F8357 and 56F8157 devices.
Address
Table 4-9 Data Memory Peripheral Base Address Map Summary
Peripheral
Table 4-8 EOnCE Memory Map (Continued)
OTXRXSR (8 bits)
OTX / ORX (32 bits)
OTX1 / ORX1
Register Acronym
56F8357 Technical Data, Rev. 15
EMI
TMRA
TMRB
TMRC
TMRD
PWMA
PWMB
DEC0
DEC1
ITCN
ADCA
ADCB
TSENSOR
SCI0
SCI1
Prefix
Transmit and Receive Status and Control Register
Transmit Register / Receive Register
Transmit Register Upper Word
Receive Register Upper Word
Base Address
X:$00 F0C0
X:$00 F1A0
X:$00 F020
X:$00 F040
X:$00 F080
X:$00 F100
X:$00 F140
X:$00 F160
X:$00 F180
X:$00 F190
X:$00 F200
X:$00 F240
X:$00 F270
X:$00 F280
X:$00 F290
Register Name
Peripheral Memory Mapped Registers
Table Number
4-10
4-11
4-12
4-13
4-14
4-15
4-16
4-17
4-18
4-19
4-20
4-21
4-22
4-23
4-24
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