dsp56800eerm Freescale Semiconductor, Inc, dsp56800eerm Datasheet - Page 43

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dsp56800eerm

Manufacturer Part Number
dsp56800eerm
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
4.3 Interrupt Vector Table
Table 4-5
organized with higher-priority vectors at the top and lower-priority interrupts lower in the table. The
priority of an interrupt can be assigned to different levels, as indicated, allowing some control over
interrupt priorities. All level 3 interrupts will be serviced before level 2, and so on. For a selected priority
level, the lowest vector number has the highest priority.
The location of the vector table is determined by the Vector Base Address (VBA) register. Please see
5.6.11
In some configurations, the reset address and COP reset address will correspond to vector 0 and 1 of the
interrupt vector table. In these instances, the first two locations in the vector table must contain branch or
JMP instructions. All other entries must contain JSR instructions.
Freescale Semiconductor
Preliminary
1. If Flash Security Mode is enabled, EXTBOOT Mode 1 cannot be used. See Security Features,
2. This mode provides maximum compatibility with 56F80x parts while operating externally.
3. “EMI_MODE = 0” when EMI_MODE pin is tied to ground at boot up.
4. “EMI_MODE = 1” when EMI_MODE pin is tied to V
5. Not accessible in reset configuration, since the address is above P:$00 FFFF. The higher bit address/GPIO (and/or chip
6. Booting from this external address allows prototyping of the internal Boot Flash.
7. Two independent program Flash blocks allow one to be programmed/erased while executing from another. Each block
P:$1F FFFF
P:$10 0000
P:$0F FFFF
P:$03 0000
P:$02 FFFF
P:$02 F800
P:$02 F7FF
P:$02 2000
P:$02 1FFF
P:$02 0000
P:$01 FFFF
P:$01 0000
P:$00 FFFF
P:$00 0000
selects) pins must be reconfigured before this external memory is accessible.
must have its own mass erase.
Begin/End
Address
for the reset value of the VBA.
provides the reset and interrupt priority structure, including on-chip peripherals. The table is
External Program Memory
Boot Flash
16KB
COP Reset Address = 02 0002
Boot Location = 02 0000
Internal Program Flash
128KB
Internal Program Flash
128KB
16-Bit External Address Bus
Mode 0 (MA = 0)
Internal Boot
Internal Boot
Table 4-4 Program Memory Map at Reset
On-Chip Program RAM
7
7
56F8357 Technical Data, Rev. 15
5
Reserved
116KB
4KB
DD
External Program Memory
Boot Flash
16KB
(Not Used for Boot in this Mode)
Internal Program Flash
128KB
External Program RAM
COP Reset Address = 00 0002
Boot Location = 00 0000
16-Bit External Address Bus
at boot up.
EMI_MODE = 0
2
Mode 1
,
3
External Boot
5
1
(MA = 1)
External Program Memory
External Program Memory
COP Reset Address = 02 0002
Boot Location = 02 0000
20-Bit External Address Bus
Part
EMI_MODE = 1
7.
Interrupt Vector Table
4
6
5
Part
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