dsp56800eerm Freescale Semiconductor, Inc, dsp56800eerm Datasheet - Page 46

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dsp56800eerm

Manufacturer Part Number
dsp56800eerm
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
4.4 Data Map
Note: Data Flash is NOT available on the 56F8157 device.
46
1. All addresses are 16-bit Word addresses, not byte addresses.
2. In the Operating Mode Register (OMR).
3. The Data RAM is organized as a 2K x 32-bit memory to allow single-cycle, long-word operations.
1. Two words are allocated for each entry in the vector table. This does not allow the full address range to be referenced
2. If the VBA is set to $0200 (or VBA = 0000 for Mode 1, EMI_MODE = 0), the first two locations of the vector table are
2.
X:$FF FFFF
X:$FF FF00
X:$FF FEFF
X:$01 0000
X:$00 FFFF
X:$00 F000
X:$00 EFFF
X:$00 3000
X:$00 2FFF
X:$00 2000
X:$00 1FFF
X:$00 0000
ADCA
ADCB
ADCA
PWMB
PWMA
PWMB
PWMA
core
Peripheral
Begin/End
from the vector table, providing only 19 bits of address.
the chip reset addresses; therefore, these locations are not interrupt vectors.
Address
Number
Vector
EOnCE
256 locations allocated
External Memory
On-Chip Peripherals
4096 locations allocated
External Memory
On-Chip Data Flash
8KB
On-Chip Data RAM
16KB
74
75
76
77
78
79
80
81
Table 4-5 Interrupt Vector Table Contents
3
Priority
Level
0-2
0-2
0-2
0-2
0-2
0-2
0-2
- 1
EX = 0
Table 4-6 Data Memory Map
Vector Base
Address +
56F8357 Technical Data, Rev. 15
P:$9A
P:$9C
P:$9E
P:$A0
P:$A2
P:$94
P:$96
P:$98
2
ADC A Conversion Complete / End of Scan
ADC B Zero Crossing or Limit Error
ADC A Zero Crossing or Limit Error
Reload PWM B
Reload PWM A
PWM B Fault
PWM A Fault
SW Interrupt LP
EOnCE
256 locations allocated
External Memory
On-Chip Peripherals
4096 locations allocated
External Memory
Interrupt Function
1
1
(Continued)
EX = 1
Freescale Semiconductor
Preliminary

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