dsp56800eerm Freescale Semiconductor, Inc, dsp56800eerm Datasheet - Page 152

• Manufacturer Part Number: dsp56800eerm
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

10.14 Controller Area Network (CAN) Timing
Note: CAN is not available in the 56F8157 device.
10.15 JTAG Timing
152
1. Parameters listed are guaranteed by design
1. TCK frequency of operation must be less than 1/8 the processor rate.
2. T = processor clock period (nominally 1/60MHz)
Baud Rate
Bus Wake Up detection
TCK frequency of operation
using EOnCE
TCK frequency of operation not
using EOnCE
TCK clock pulse width
TMS, TDI data set-up time
TMS, TDI data hold time
TCK low to TDO data valid
TCK low to TDO tri-state
TRST assertion time
CAN receive
CAN_RX
data pin
(Input)
Characteristic
Characteristic
1
1
Figure 10-18 Bus Wakeup Detection
T
Symbol
Symbol
Table 10-22 CAN Timing
BR
Table 10-23 JTAG Timing
t
WAKEUP
56F8357 Technical Data, Rev. 15
TRST
t
f
f
t
t
t
t
PW
OP
OP
DS
DH
DV
TS
CAN
T
WAKEUP
Min
2T
DC
DC
50
—
—
5
5
Min
2
—
5
SYS_CLK/8
SYS_CLK/4
Max
30
30
—
—
—
—
Max
1
—
1
MHz
MHz
Unit
ns
ns
ns
ns
ns
ns
Mbps
Unit
μs
Freescale Semiconductor
See Figure
10-19
10-19
10-19
10-20
10-20
10-20
10-20
10-21
See Figure
10-18
—
Preliminary