SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 932

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SAM9G45

Manufacturer Part Number
SAM9G45
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G45

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
41.7.10.4
Figure 41-15. Buffer Structure with and without pen detection enabled
932
trig.event1
trig.event2
trig.eventN
trig.eventN+1
Assuming ADC_TSMR(TSMOD) = 1, PENDET = 1
ADC_TSMR(TSAV) = ADC_TSMR(TSFREQ) = 0
ADC_CHSR = 0x000_0100 , ADC_EMR(TAG) = 1
DMA buffer
Structure
SAM9G35
Pen Detection Status
8
0
1
8
0
1
8
0
0
8
0
0
If the pen detection measure is enabled (PENDET is set in ADC_TSMR register), the XPOS,
YPOS, Z1, Z2 values transmitted to the buffer through ADC_LCDR register are cleared (includ-
ing the CHNB field), if the PENS flag of ADC_ISR register is 0. When the PENS flag is set,
XPOS, YPOS, Z1, Z2 are normally transmitted.
Therefore, using pen detection together with tag function eases the post-processing of the buf-
fer, especially to determine which touchscreen converted values correspond to a period of time
when the pen was in contact with the screen.
When the pen detection is disabled or the tag function is disabled, XPOS, YPOS, Z1, Z2 are nor-
mally transmitted without tag and no relationship can be found with pen status, thus post-
processing may not be easy.
2 successive tags
cleared => PENS = 0
ADC_CDR8
ADC_XPOSR
ADC_YPOSR
ADC_CDR8
ADC_XPOSR
ADC_YPOSR
ADC_CDR8
0
0
ADC_CDR8
0
0
Base Address (BA)
BA + 0x02
BA + 0x04
BA + 0x06
BA + 0x08
BA + 0x0A
BA + [(N-1) * 6]
BA + [(N-1) * 6]+ 0x02
BA + [(N-1) * 6]+ 0x04
DMA Transfer
trig.event1
trig.event2
trig.eventN
Assuming ADC_TSMR(TSMOD) = 1, PENDET = 1
ADC_TSMR(TSAV) = ADC_TSMR(TSFREQ) = 0
ADC_CHSR = 0x000_0100 , ADC_EMR(TAG) =0
DMA buffer
Structure
ADC_XPOSR*, ADC_YPOSR* can b
any value when PENS = 0
0
0
0
0
0
0
0
0
0
0
0
0
ADC_CDR8
ADC_XPOSR
ADC_YPOSR
ADC_CDR8
ADC_XPOSR
ADC_YPOSR
ADC_CDR8
ADC_XPOSR*
ADC_YPOSR*
ADC_CDR8
ADC_XPOSR*
ADC_YPOSR*
11053B–ATARM–22-Sep-11

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