SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 183

• Manufacturer Part Number: SAM9G45
• Manufacturer: Atmel Corporation

Specifications of SAM9G45

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

SAM9G35
Figure 21-7. UTMI PLL Block Diagram
UPLLEN
MAINCK
UTMI PLL
UPLLCK
UPLLCOUNT
UTMI PLL
SLCK
LOCKU
Counter
Whenever the UTMI PLL is enabled by writing UPLLEN in CKGR_UCKR, the LOCKU bit in
PMC_SR is automatically cleared. The values written in the PLLCOUNT field in CKGR_UCKR
are loaded in the UTMI PLL counter. The UTMI PLL counter then decrements at the speed of
the Slow Clock divided by 8 until it reaches 0. At this time, the LOCKU bit is set in PMC_SR and
can trigger an interrupt to the processor. The user has to load the number of Slow Clock cycles
required to cover the UTMI PLL transient time into the PLLCOUNT field.
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11053B–ATARM–22-Sep-11