SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 515

• Manufacturer Part Number: SAM9G45
• Manufacturer: Atmel Corporation

Specifications of SAM9G45

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

31.7.10
Name:
Address:
Access:
Reset:
• ENAx: [7:0]
When set, a bit of the ENA field enables the relevant channel.
• SUSPx: [7:0]
When set, a bit of the SUSPfield freezes the relevant channel and its current context.
• KEEPx: [7:0]
When set, a bit of the KEEP field resumes the current channel from an automatic stall state.
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
SUSP7
KEEP7
ENA7
31
23
15
–
7
DMAC Channel Handler Enable Register
DMAC_CHER
0xFFFFEC28 (0), 0xFFFFEE28 (1)
Write-only
0x00000000
SUSP6
KEEP6
ENA6
30
22
14
–
6
SUSP5
KEEP5
ENA5
29
21
13
–
5
KEEP4
SUSP4
ENA4
28
20
12
–
4
KEEP3
SUSP3
ENA3
27
19
11
–
3
KEEP2
SUSP2
ENA2
26
18
10
–
2
KEEP1
SUSP1
ENA1
25
17
–
9
1
SAM9G35
SAM9G35
KEEP0
SUSP0
ENA0
24
16
–
8
0
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