SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 478

• Manufacturer Part Number: SAM9G45
• Manufacturer: Atmel Corporation

Specifications of SAM9G45

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Figure 31-2. DMAC Transfer Hierarchy for Non-Memory Peripheral
Figure 31-3. DMAC Transfer Hierarchy for Memory
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478
SAM9G35
SAM9G35
Transfer
AMBA
Transfer
Buffer
Burst
Chunk
Buffer: A buffer of DMAC data. The amount of data (length) is determined by the flow controller.
For transfers between the DMAC and memory, a buffer is broken directly into a sequence of
AMBA bursts and AMBA single transfers.
For transfers between the DMAC and a non-memory peripheral, a buffer is broken into a
sequence of DMAC transactions (single and chunks). These are in turn broken into a sequence
of AMBA transfers.
Transaction: A basic unit of a DMAC transfer as determined by either the hardware or software
handshaking interface. A transaction is only relevant for transfers between the DMAC and a
source or destination peripheral if the source or destination peripheral is a non-memory device.
There are two types of transactions: single transfer and chunk transfer.
DMAC transfer: Software controls the number of buffers in a DMAC transfer. Once the DMAC
transfer has completed, then hardware within the DMAC disables the channel and can generate
Transfer
AMBA
Burst
Buffer
– Single transfer: The length of a single transaction is always 1 and is converted to a
– Chunk transfer: The length of a chunk is programmed into the DMAC. The chunk is
Transfer
AMBA
Transfer
Burst
single AMBA access.
then converted into a sequence of AHB access.DMAC executes each AMBA burst
transfer by performing incremental bursts that are no longer than 16 beats.
Chunk
Buffer
HDMA Transfer
Transfer
AMBA
Burst
Buffer
HDMA Transfer
Transfer
AMBA
Burst
Transfer
Chunk
Buffer
Transfer
AMBA
Burst
Transfer
AMBA
Single
Buffer
Transfer
AMBA
Single
Transfer
Transfer
Single
AMBA
Single
DMA Transfer
Level
Buffer Transfer
Level
AMBA Transfer
Level
DMA Transfer
Level
Buffer Transfer
Level
DMA Transaction
Level
AMBA Transfer
Level
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11