SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 1084

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SAM9G45

Manufacturer Part Number
SAM9G45
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G45

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Figure 45-6. Overlay Example with two different video prioritization algorithms
45.6.11.2
1084
1084
SAM9G35
SAM9G35
Base Image
Overlay Blending
Base Image
Base width
ers. When VIDPRI field is set to zero the OVR1 layer is located above the HEO layer. When
VIDPRI field is set to one, OVR1 is located below the HEO layer.
The blending function requires two pixels (one iterated from the previous blending stage and one
from the current overlay color) and a set of blending configuration parameters. These parame-
ters define the color operation.
Video Prioritization Algorithm 1: HCC > OVR1 > HEO > BASE
Video Prioritization Algorithm 2: HCC > HEO > OVR1 > BASE
o1(x,y)
Overlay1
OVR1
Overlay1
OVR1
OVR1 width
HEO
HEO
o0(x,y)
HCC
HEO width
HCC
Base
height
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
OVR1
height
HEO
height

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