SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 234

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SAM9G45

Manufacturer Part Number
SAM9G45
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G45

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
23.6
234
234
I/O Lines Programming Example
SAM9G35
SAM9G35
The programing example as shown in
configuration.
Table 23-1.
• 4-bit output port on I/O lines 0 to 3, (should be written in a single write operation), open-drain,
• Four output signals on I/O lines 4 to 7 (to drive LEDs for example), driven high and low, no
• Four input signals on I/O lines 8 to 11 (to read push-button states for example), with pull-up
• Four input signals on I/O line 12 to 15 to read an external device status (polled, thus no input
• I/O lines 16 to 19 assigned to peripheral A functions with pull-up resistor
• I/O lines 20 to 23 assigned to peripheral B functions with pull-down resistor
• I/O line 24 to 27 assigned to peripheral C with Input Change Interrupt, no pull-up resistor and
• I/O line 28 to 31 assigned to peripheral D, no pull-up resistor and no pull-down resistor
with pull-up resistor
pull-up resistor, no pull-down resistor
resistors, glitch filters and input change interrupts
change interrupt), no pull-up resistor, no glitch filter
no pull-down resistor
PIO_ABCDSR1
PIO_ABCDSR2
PIO_PPDDR
PIO_PPDER
PIO_OWDR
PIO_MDDR
PIO_OWER
PIO_SODR
PIO_CODR
PIO_MDER
PIO_PUDR
PIO_PUER
PIO_IFDR
PIO_OER
PIO_ODR
PIO_IFER
PIO_PER
PIO_PDR
Register
PIO_IER
PIO_IDR
Programming Example
Table 23-1
Value to be Written
below is used to obtain the following
0x0FFF_ FFF0
0xFFFF_F0FF
0x0FFF_FFFF
0xFFFF_FFF0
0xFF0F_FFFF
0xFFFF_FF00
0xF0FF_F0FF
0x0000_FFFF
0xFFFF_0000
0x0000_00FF
0x0F00_0F00
0xFFF0_00F0
0x000F_FF0F
0xF0F0_0000
0xFF00_0000
0x0000_0F00
0x0000_0000
0x0000_000F
0x00F0_0000
0x0000_000F
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11

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