ATTINY20-XU Atmel, ATTINY20-XU Datasheet - Page 30

MCU AVR 2KB FLASH 12MHZ 14TSSOP

ATTINY20-XU

Manufacturer Part Number
ATTINY20-XU
Description
MCU AVR 2KB FLASH 12MHZ 14TSSOP
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet

Specifications of ATTINY20-XU

Core Processor
AVR
Core Size
8-Bit
Speed
12MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
ATtiny
Core
AVR
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
SPI, TWI
Maximum Clock Frequency
12 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY20-XU
Manufacturer:
Atmel
Quantity:
904
8. System Control and Reset
8.1
8.2
8.2.1
30
Resetting the AVR
Reset Sources
ATtiny20
Power-on Reset
During reset, all I/O registers are set to their initial values, and the program starts execution from
the Reset Vector. The instruction placed at the Reset Vector must be a RJMP – Relative Jump –
instruction to the reset handling routine. If the program never enables an interrupt source, the
interrupt vectors are not used, and regular program code can be placed at these locations. The
circuit diagram in
defined in section
Figure 8-1.
The I/O ports of the AVR are immediately reset to their initial state when a reset source goes
active. This does not require any clock source to be running.
After all reset sources have gone inactive, a delay counter is invoked, stretching the internal
reset. This allows the power to reach a stable level before normal operation starts. The start up
sequence is described in
The ATtiny20 has four sources of reset:
A Power-on Reset (POR) pulse is generated by an on-chip detection circuit. The detection level
is defined in section
whenever V
Reset, as well as to detect a failure in supply voltage.
A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reaching the
Power-on Reset threshold voltage invokes the delay counter, which determines how long the
• Power-on Reset. The MCU is reset when the supply voltage is below the Power-on Reset
• External Reset. The MCU is reset when a low level is present on the RESET pin for longer
• Watchdog Reset. The MCU is reset when the Watchdog Timer period expires and the
• Brown Out Reset. The MCU is reset when the Brown-Out Detector is enabled and supply
RESET
RESET
threshold (V
than the minimum pulse length
Watchdog is enabled
voltage is below the brown-out threshold (V
V
CC
CC
CC
PULL-UP
PULL-UP
RESISTOR
RESISTOR
Reset Logic
is below the detection level. The POR circuit can be used to trigger the Start-up
POT
Figure 8-1
“System and Reset Characteristics” on page
)
FILTER
FILTER
SPIKE
SPIKE
“System and Reset Characteristics” on page
RSTDISBL
RSTDISBL
“Starting from Reset” on page
shows the reset logic. Electrical parameters of the reset circuitry are
DATA BUS
RESET CIRCUIT
RESET CIRCUIT
RESET CIRCUIT
RESET CIRCUIT
RESET CIRCUIT
RESET CIRCUIT
BODLEVEL2...0
BODLEVEL2...0
BROWN OUT
BROWN OUT
POWER-ON
POWER-ON
EXTERNAL
EXTERNAL
OSCILLATOR
OSCILLATOR
WATCHDOG
WATCHDOG
WATCHDOG
WATCHDOG
RESET FLAG REGISTER
RESET FLAG REGISTER
TIMER
TIMER
BOT
(RSTFLR)
(RSTFLR)
)
20.
GENERATOR
GENERATOR
175.
CLOCK
CLOCK
COUNTER RESET
COUNTER RESET
CK
CK
175. The POR is activated
COUNTERS
COUNTERS
DELAY
DELAY
TIMEOUT
TIMEOUT
S
R
Q
8235B–AVR–04/11
INTERNAL
INTERNAL
RESET
RESET

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