ATTINY20-XU Atmel, ATTINY20-XU Datasheet - Page 161

MCU AVR 2KB FLASH 12MHZ 14TSSOP

ATTINY20-XU

Manufacturer Part Number
ATTINY20-XU
Description
MCU AVR 2KB FLASH 12MHZ 14TSSOP
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet

Specifications of ATTINY20-XU

Core Processor
AVR
Core Size
8-Bit
Speed
12MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
ATtiny
Core
AVR
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
SPI, TWI
Maximum Clock Frequency
12 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY20-XU
Manufacturer:
Atmel
Quantity:
904
18.7.1
18.7.2
8235B–AVR–04/11
TPIIR – Tiny Programming Interface Identification Register
TPIPCR – Tiny Programming Interface Physical Layer Control Register
Table 18-11. Summary of Control and Status Registers (Continued)
• Bits 7:0 – TPIIC: Tiny Programming Interface Identification Code
These bits give the identification code for the Tiny Programming Interface. The code can be
used be the external programmer to identify the TPI. The identification code of the Tiny Pro-
gramming Interface is shown in
Table 18-12. Identification Code for Tiny Programming Interface
• Bits 7:3 – Res: Reserved Bits
These bits are reserved and will always read as zero.
• Bits 2:0 – GT[2:0]: Guard Time
These bits specify the number of additional IDLE bits that are inserted to the idle time when
changing from reception mode to transmission mode. Additional delays are not inserted when
changing from transmission mode to reception.
The total idle time when changing from reception to transmission mode is Guard Time plus two
IDLE bits.
Table 18-13. Guard Time Settings
Bit
CSS: 0x0F
Read/Write
Initial Value
Bit
CSS: 0x02
Read/Write
Initial Value
Addr.
0x02
0x01
0x00
Code
Interface Identification
GT2
0
0
0
0
1
Name
TPIPCR
Reserved
TPISR
Table 18-13
R
R
7
0
7
0
Bit 7
shows the available Guard Time settings.
R
R
6
0
6
0
GT1
0
0
1
1
0
Programming Interface Identification Code
Bit 6
Table
R
R
5
0
5
0
18-12.
R
R
4
0
4
0
Bit 5
GT0
0
1
0
1
0
R
R
3
0
3
0
Value
0x80
Bit 4
Guard Time (Number of IDLE bits)
+128 (default value)
+64
+32
+16
+8
GT2
R/W
R
2
0
2
0
Bit 3
GT1
R/W
R
1
0
1
0
Bit 2
GT2
GT0
R/W
R
0
0
0
0
NVMEN
ATtiny20
Bit 1
GT1
TPIPCR
TPIIR
Bit 0
GT0
161

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