MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 606

• Manufacturer Part Number: MPC564MZP56
• Description: IC MCU 512K FLASH 56MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Core: PowerPC
• Processor Series: MPC5xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 56 MHz
• Data Ram Size: 32 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 32
• Height: 1.95 mm
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Length: 27 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 2.7 V, 5.25 V
• Supply Voltage (min): 2.5 V, 4.75 V
• Width: 27 mm
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

QADC64E Enhanced Mode Operation
Example 3 below shows the timing for conversions in gated continuous-scan mode with the same
assumptions in the amended definition for the PF bit in this mode to reflect the condition that a gate closing
occurred before the queue completed is a proposal under consideration at this time as example 2.
14-64
Trig1
(gate)
EOC
QS
Q1 RES
SSE
CF1
PF1
CWP
CWPQ1
At the end of Q1,the completion flag CF1 sets and the queue restarts. Also,
note that if the queue starts a second time and completes, the trigger overrun
flag TOR1 sets.
LAST
0
LAST
Software must set SSE
LAST
Software must clear PF1
CCW0
Figure 14-45. Gated Mode, Single-Scan Timing
8
MPC561/MPC563 Reference Manual, Rev. 1.2
CCW0
R0
CCW1
0
CCW1
R1
NOTE
CCW0
CCW0
CCW1
R0
8
CCW2
CCW1
R1
Freescale Semiconductor
CCW3
CCW2
R2
CCW3
R3
0