MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 23

IC MCU 512K FLASH 56MHZ 388-BGA

MPC564MZP56

Manufacturer Part Number
MPC564MZP56
Description
IC MCU 512K FLASH 56MHZ 388-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC564MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Core
PowerPC
Processor Series
MPC5xx
Data Bus Width
32 bit
Maximum Clock Frequency
56 MHz
Data Ram Size
32 KB
On-chip Adc
Yes
Number Of Programmable I/os
56
Number Of Timers
2
Operating Supply Voltage
0 V to 5 V
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
32
Height
1.95 mm
Interface Type
CAN, JTAG, QSPI, SCI, SPI, UART
Length
27 mm
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
2.7 V, 5.25 V
Supply Voltage (min)
2.5 V, 4.75 V
Width
27 mm
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC564MZP56
Manufacturer:
FREESCAL
Quantity:
364
Part Number:
MPC564MZP56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC564MZP56
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Part Number:
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17.8.5.1
17.8.5.2
17.8.5.3
17.8.5.4
17.8.5.5
17.9
17.9.1
17.9.1.1
17.9.2
17.9.3
17.9.3.1
17.9.3.2
17.9.3.3
17.9.3.4
17.9.3.5
17.9.3.5.1
17.9.3.5.2
17.9.3.5.3
17.9.3.6
17.9.4
17.9.5
17.9.6
17.9.6.1
17.9.6.2
17.9.6.3
17.9.6.4
17.9.6.5
17.10
17.10.1
17.10.2
17.10.3
17.10.3.1
17.10.3.2
17.10.3.3
17.10.3.4
17.10.3.5
17.10.3.6
17.10.3.7
17.10.3.8
17.10.3.9
Freescale Semiconductor
Paragraph
Number
MIOS14 Double Action Submodule (MDASM) ........................................................ 17-26
MIOS14 Pulse Width Modulation Submodule (MPWMSM) .................................... 17-46
MDASM Features ................................................................................................... 17-27
MDASM Description .............................................................................................. 17-28
MDASM Modes of Operation ................................................................................ 17-29
Modular I/O Bus (MIOB) Interface ........................................................................ 17-39
Effect of RESET on MDASM ................................................................................ 17-39
MDASM Registers ................................................................................................. 17-39
MPWMSM Terminology ........................................................................................ 17-47
MPWMSM Features ............................................................................................... 17-47
MPWMSM Description .......................................................................................... 17-48
MMCSM Register Organization ......................................................................... 17-22
MMCSM Up-Counter Register (MMCSMCNT) ............................................... 17-23
MMCSM Modulus Latch Register (MMCSMML) ............................................ 17-24
MMCSM Status/Control Register (MMCSMSCRD)
MMCSM Status/Control Register (MMCSMSCR) ............................................ 17-24
MDASM Signal Functions ................................................................................. 17-28
Disable (DIS) Mode ............................................................................................ 17-29
Input Pulse Width Measurement (IPWM) Mode ................................................ 17-30
Input Period Measurement (IPM) Mode ............................................................. 17-31
Input Capture (IC) Mode .................................................................................... 17-32
Output Compare (OCB and OCAB) Modes ....................................................... 17-33
Output Pulse Width Modulation (OPWM) Mode .............................................. 17-36
MDASM Registers Organization ....................................................................... 17-39
MDASM Data A (MDASMAR) Register .......................................................... 17-41
MDASM Data B (MDASMBR) Register ........................................................... 17-42
MDASM Status/Control Register (MDASMSCRD) (Duplicated) .................... 17-43
MDASM Status/Control Register (MDASMSCR) ............................................ 17-43
Clock Selection ................................................................................................... 17-49
Counter ............................................................................................................... 17-49
Period Register .................................................................................................... 17-49
Pulse Width Registers ......................................................................................... 17-50
Duty Cycles (0% and 100%) .............................................................................. 17-51
Pulse/Frequency Range Table ............................................................................ 17-52
MPWMSM Status and Control Register (SCR) ................................................. 17-53
MPWMSM Interrupt .......................................................................................... 17-53
MPWMSM Port Functions ................................................................................. 17-54
(Duplicated) .................................................................................................... 17-24
Single Shot Output Pulse Operation ............................................................... 17-34
Single Output Compare Operation ................................................................. 17-35
Output Port Bit Operation ............................................................................... 17-36
MPC561/MPC563 Reference Manual, Rev. 1.2
Contents
Title
Number
Page
xxiii

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