MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 125

IC MCU 512K FLASH 56MHZ 388-BGA

MPC564MZP56

Manufacturer Part Number
MPC564MZP56
Description
IC MCU 512K FLASH 56MHZ 388-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC564MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Core
PowerPC
Processor Series
MPC5xx
Data Bus Width
32 bit
Maximum Clock Frequency
56 MHz
Data Ram Size
32 KB
On-chip Adc
Yes
Number Of Programmable I/os
56
Number Of Timers
2
Operating Supply Voltage
0 V to 5 V
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
32
Height
1.95 mm
Interface Type
CAN, JTAG, QSPI, SCI, SPI, UART
Length
27 mm
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
2.7 V, 5.25 V
Supply Voltage (min)
2.5 V, 4.75 V
Width
27 mm
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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Table 2-11
of PDMCR2[PCS6EN], PDMCR2[PCS7EN], SHORT_REG [SH_ET1] and SHORT_REG [SH_ET2].
Also shown in this table is the internal connection of the ETRIG signals when the enhanced chip select
function is used.
Freescale Semiconductor
1. If PCS4/5EN = 1 then A/B_T2CLK into the module is pulled up internally (enabling Div/8 clock, in gate mode).
2. If only PCS4EN=1, then A_T2CLK can be driven into B_T2CLK if PPM_SHORT[SH_T2CLK] is set.
3. If only PCS5EN=1 then A_T2CLK will be pulled up, if PPM_SHORT[SH_T2CLK] is set, then, B_T2CLK will be high
All of this is regardless of the Pull up/down state.
Note: The PPM shorting function has higher priority logic. If shorting is selected, then A_T2CLK → B_T2CLK. If A_T2CLK
[PCS5EN]
PDMCR2
regardless of pin state.
0
1
1
1
1
is selected as PCS then both A_T2CLK and B_T2CLK will be high regardless of B_T2CLK/PCS4 Pad state.
details the functionality of the ETRIG1/PCS6 and ETRIG2/PCS7 pads dependent on the values
[PCS4EN]
PDMCR2
1
0
0
1
1
SHORT_REG
[SH_T2CLK]
Table 2-10. Enhanced PCS 4 & 5 Pad Function
1
0
1
0
1
MPC561/MPC563 Reference Manual, Rev. 1.2
A_T2CLK/PCS5
PAD Function
A_T2CLK
PCS5
PCS5
PCS5
PCS5
B_T2CLK/PCS4
PAD Function
B_T2CLK
B_T2CLK
PCS4
PCS4
PCS4
A_T2CLK internal
driven HI internally
driven HI internally
driven HI internally
driven HI internally
A_T2CLK Signal
A_T2CLK Signal
A_T2CLK Signal
A_T2CLK Signal
A_T2CLK/PCS5
Connection
TPU_A
Pad
B_T2CLK internal
driven HI internally
driven HI internally
driven HI internally
B_T2CLK Signal
B_T2CLK Signal
B_T2CLK Signal
A_T2CLK/PCS5
B_T2CLK/PCS4
by connection to
by connection to
Connection
Signal Descriptions
A_T2CLK
A_T2CLK
TPU_B
Pad
Pad
2-27

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