DS-FND-BSX-PC Xilinx Inc, DS-FND-BSX-PC Datasheet - Page 319
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DS-FND-BSX-PC
Manufacturer Part Number
DS-FND-BSX-PC
Description
FOUNDATION BASE SYS W/SYN EXPRES
Manufacturer
Xilinx Inc
Type
Foundation Systemr
Datasheet
1.DS-FND-BSX-PC.pdf
(330 pages)
Specifications of DS-FND-BSX-PC
For Use With/related Products
Xilinx Programmable Logic Devices
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
122-1185
- Current page: 319 of 330
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Foundation Series 2.1i User Guide
BUFG
BUFGP
BUFGS
BUFGLS
BUFGE
BUFFCLK
BUFGSR
BUFGTS
Name
XC3000
XC4000E
XC4000X
XC5200
XC9000
Spartan
SpartanXL
Virtex
XC4000E
XC5200
Spartan
Virtex
XC4000E
XC5200
Spartan
XC4000X
SpartanXL
XC4000X
XC4000X
XC9000
XC9000
Library
tools to make an appropriate physical buffer allocation. For more
information on the components, see the Programmable Logic Data Book.
Table C-6 Global Buffer Components
Global early buffer. XC4000EX
Global Set/Reset buffer
Global Tri-State Enable buffer.
An architecture-independent
global buffer, distributes high fan-
out clock signals throughout a PLD
device.
A primary global buffer, distrib-
utes high fan-out clock or control
signals throughout PLD devices.
A secondary global buffer, distrib-
utes high fan-out clock or control
signals throughout a PLD device.
Global low-skew buffer. BUFGLS
components can drive all flip-flop
clock pins.
devices have eight total, two in
each corner. BUFGE components
can drive all clock pins in their
corner of the device.
Fast clocks. XC4000EX devices
have 4 total, 2 each on the left and
right sides. BUFFCLK components
can drive all IOB clock pins on
their left or right half edge.
Description
Instantiated Components
Outputs
O
O
O
O
O
O
O
O
Inputs
I
I
I
I
I
I
I
I
C-9
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