DS-FND-BSX-PC Xilinx Inc, DS-FND-BSX-PC Datasheet - Page 153

• Manufacturer Part Number: DS-FND-BSX-PC
• Description: FOUNDATION BASE SYS W/SYN EXPRES
• Manufacturer: Xilinx Inc
• Type: Foundation Systemr

Specifications of DS-FND-BSX-PC

• For Use With/related Products: Xilinx Programmable Logic Devices
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 122-1185

Foundation Series 2.1i User Guide
Creating the Schematic and Generating a Netlist
and choosing Document
The file will be automatically added to the project when the entire
design is analyzed later.
This section lists the basic steps for creating a schematic and gener-
ating a netlist from it.
1.
2.
3.
4.
5.
Open the Schematic Editor by selecting the Schematic Editor icon
from the Design Entry box on the Project Manager’s Flow tab.
Select Mode
schematic. Select specific components from the SC Symbols
window.
To define the ports, use Hierarchy Connectors.
Do not use pad components (IPAD, OPAD, etc.) from the Xilinx
Unified Libraries. Foundation will synthesize the design from the
top down and will add ports as well as buffers, if necessary.
Care must be taken when adding attributes to the schematic as
follows:
•
•
Save your schematic by selecting File
Add the schematic to your project by selecting Hierarchy
Add Current Sheet to Project. The schematic is netlisted
Pin locations, slew rates, and certain other design constraints
may be added to the design using the Express Constraints
Editor or a UCF file.
Pin location or slew rate constraints may be placed on the I/
O buffer (or flip-flop or latch) on the schematic. Do not place
them on the net or the hierarchy connector.
Symbols to add components to your new
Remove. You can now create the macro.
Design Methodologies - HDL Flow
Save.
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