DS-FND-BSX-PC Xilinx Inc, DS-FND-BSX-PC Datasheet - Page 30

• Manufacturer Part Number: DS-FND-BSX-PC
• Description: FOUNDATION BASE SYS W/SYN EXPRES
• Manufacturer: Xilinx Inc
• Type: Foundation Systemr

Specifications of DS-FND-BSX-PC

• For Use With/related Products: Xilinx Programmable Logic Devices
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 122-1185

Foundation Series 2.1i User Guide
Appendix C Instantiated Components
xx
Efficient Use of Timespecs and Layout Constraints....................... B-18
Standard Block Delay Symbols...................................................... B-21
Table of Supported Constraints ..................................................... B-22
Basic UCF Syntax Examples ......................................................... B-25
User Constraint File Example ........................................................ B-29
Constraining LogiBLOX RAM/ROM with Synopsys ....................... B-33
Library/Architecture Definitions ...................................................... C-2
STARTUP Component................................................................... C-3
STARTBUF Component................................................................. C-3
Converting a Logical Design to a Physical Design ................... B-16
“Last One Wins” Resolution ...................................................... B-17
XC5200XL Constraints ............................................................. B-17
The “Starter Set” of Timing Constraints .................................... B-18
PERIOD Timespec.................................................................... B-25
FROM:TO Timespecs ............................................................... B-25
OFFSET Timespec ................................................................... B-26
Timing Ignore ............................................................................ B-26
Path Exceptions ........................................................................ B-27
Miscellaneous Examples .......................................................... B-28
Estimating the Number of Primitives Used ............................... B-33
How the RAM Primitives are Named ........................................ B-33
Referencing a LogiBLOX Module/Component in the HDL Flow B-34
Referencing the Primitives of a LogiBLOX Module in the HDL Flow B-
35
HDL Flow Verilog Example ....................................................... B-35
HDL Flow VHDL Example......................................................... B-36
XC3000 Library ......................................................................... C-2
XC4000E Library....................................................................... C-2
XC4000X Library....................................................................... C-2
XC5200 Library ......................................................................... C-2
XC9000 Library ......................................................................... C-2
Spartan Library ......................................................................... C-2
SpartanXL Library ..................................................................... C-3
Virtex Library............................................................................. C-3
test.v: ................................................................................... B-35
inside.v:................................................................................ B-36
test.ucf ................................................................................. B-36
test.vhd ................................................................................ B-36
inside.vhd............................................................................. B-37
test.ucf ................................................................................. B-38
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