DS-FND-BSX-PC Xilinx Inc, DS-FND-BSX-PC Datasheet - Page 263
DS-FND-BSX-PC
Manufacturer Part Number
DS-FND-BSX-PC
Description
FOUNDATION BASE SYS W/SYN EXPRES
Manufacturer
Xilinx Inc
Type
Foundation Systemr
Datasheet
1.DS-FND-BSX-PC.pdf
(330 pages)
Specifications of DS-FND-BSX-PC
For Use With/related Products
Xilinx Programmable Logic Devices
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
122-1185
- Current page: 263 of 330
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Foundation Series 2.1i User Guide
MAP
mapping
MRP file
NCD file
net
The MAP program maps a logical design to a Xilinx FPGA. The input
to a mapping program is an NGD file. The MAP program is initiated
within the Flow Engine during Implementation.
Mapping is the process of assigning a design’s logic elements to the
specific physical elements that actually implement logic functions in
a device.
An MRP (mapping report) file is an output of the MAP run. It is an
ASCII file containing information about the MAP run. The informa-
tion in this file contains DRC warnings and messages, mapper warn-
ings and messages, design information, schematic attributes,
removed logic, expanded logic, signal cross references, symbol cross
references, physical design errors and warnings, and a design
summary.
An NCD (netlist circuit description) file is the output design file from
the MAP program, LCA2NCD, PAR, or EPIC. It is a flat physical
design database correlated to the physical side of the NGD in order to
provide coupling back to the user’s original design. The NCD file is
an input file to MAP, PAR, TRCE, BitGen, and NGDAnno.
A net is a logical connection between two or more symbol instance
pins. After routing, the abstract concept of a net is transformed to a
physical connection called a wire.
A net is an electrical connection between components or nets. It can
also be a connection from a single component. It is the same as a wire
or a signal.
Glossary
A-11
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