LFDAS12XSDT Freescale Semiconductor, LFDAS12XSDT Datasheet - Page 86

• Manufacturer Part Number: LFDAS12XSDT
• Description: HARDWARE MC9S12XS 52-PIN
• Manufacturer: Freescale Semiconductor

Specifications of LFDAS12XSDT

• Module/board Type: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: -

1
Port Integration Module (S12XSPIMV1)
2.3.19
86
Address 0x0241
Read: Anytime.
Write:Never, writes to this register have no effect.
Field
Field
PTIT
Reset
PTT
PTT
3-0
7-0
5
W
R
Port T general purpose input/output data—Data Register, TIM output, routed PWM output, VREG_API output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port T general purpose input/output data—Data Register, TIM output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port T input data—
A read always returns the buffered input state of the associated pin. It can be used to detect overload or short circuit
conditions on output pins.
• The TIM output function takes precedence over the routed PWM, VREG_API function and the general purpose
• The routed PWM function takes precedence over VREG_API and the general purpose I/O function if the related
• The VREG_API takes precedence over the general purpose I/O function if enabled.
• The TIM output function takes precedence over the general purpose I/O function if the related channel is enabled.
PTIT7
Port T Input Register (PTIT)
I/O function if the related channel is enabled.
channel is enabled.
u
7
= Unimplemented or Reserved
PTIT6
Table 2-16. PTT Register Field Descriptions (continued)
u
6
Table 2-17. PTIT Register Field Descriptions
Figure 2-17. Port T Input Register (PTIT)
S12XS Family Reference Manual, Rev. 1.11
PTIT5
u
5
PTIT4
u
4
Description
Description
u = Unaffected by reset
PTIT3
3
u
PTIT2
u
2
Freescale Semiconductor
PTIT1
u
1
Access: User read
PTIT0
u
0
1