LFDAS12XSDT Freescale Semiconductor, LFDAS12XSDT Datasheet - Page 584

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LFDAS12XSDT

Manufacturer Part Number
LFDAS12XSDT
Description
HARDWARE MC9S12XS 52-PIN
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of LFDAS12XSDT

Module/board Type
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
-
128 KByte Flash Module (S12XFTMR128K1V1)
During the reset sequence, the FOPT register is loaded from the Flash nonvolatile byte in the Flash
configuration field at global address 0x7F_FF0E located in P-Flash memory (see
by reset condition F in
containing the Flash nonvolatile byte during the reset sequence, all bits in the FOPT register will be set.
19.3.2.16 Flash Reserved2 Register (FRSV2)
This Flash register is reserved for factory testing.
All bits in the FRSV2 register read 0 and are not writable.
19.3.2.17 Flash Reserved3 Register (FRSV3)
This Flash register is reserved for factory testing.
All bits in the FRSV3 register read 0 and are not writable.
19.3.2.18 Flash Reserved4 Register (FRSV4)
This Flash register is reserved for factory testing.
584
NV[7:0]
Offset Module Base + 0x0011
Offset Module Base + 0x0012
Reset
Reset
Field
7–0
W
W
R
R
Nonvolatile Bits — The NV[7:0] bits are available as nonvolatile bits. Refer to the device user guide for proper
use of the NV bits.
0
0
0
0
7
7
= Unimplemented or Reserved
= Unimplemented or Reserved
Figure
0
0
0
0
6
6
Figure 19-23. Flash Reserved2 Register (FRSV2)
Figure 19-24. Flash Reserved3 Register (FRSV3)
19-22. If a double bit fault is detected while reading the P-Flash phrase
S12XS Family Reference Manual, Rev. 1.11
Table 19-27. FOPT Field Descriptions
0
0
0
0
5
5
0
0
0
0
4
4
Description
0
0
0
0
3
3
0
0
0
0
2
2
Table
Freescale Semiconductor
0
0
0
0
1
1
19-3) as indicated
0
0
0
0
0
0

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