LFDAS12XSDT Freescale Semiconductor, LFDAS12XSDT Datasheet - Page 461

• Manufacturer Part Number: LFDAS12XSDT
• Description: HARDWARE MC9S12XS 52-PIN
• Manufacturer: Freescale Semiconductor

Specifications of LFDAS12XSDT

• Module/board Type: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: -

Chapter 16
Timer Module (TIM16B8CV2)
16.1
The basic timer consists of a 16-bit, software-programmable counter driven by a enhanced programmable
prescaler.
This timer can be used for many purposes, including input waveform measurements while simultaneously
generating an output waveform. Pulse widths can vary from microseconds to many seconds.
This timer contains 8 complete input capture/output compare channels and one pulse accumulator. The
input capture function is used to detect a selected transition edge and record the time. The output compare
function is used for generating output signals or for timer software delays. The 16-bit pulse accumulator
is used to operate as a simple event counter or a gated time accumulator. The pulse accumulator shares
timer channel 7 when in event mode.
A full access for the counter registers or the input capture/output compare registers should take place in
one clock cycle. Accessing high byte and low byte separately for all of these registers may not yield the
same result as accessing them in one word.
16.1.1
The TIM16B8CV2 includes these distinctive features:
Freescale Semiconductor
Revision
Number
V02.05
V02.06
V02.07
Introduction
Revision Date Sections Affected
04 May 2010
26 Aug 2009
Features
9 Jul 2009
16.3.2.12/16-477
16.3.2.13/16-477
16.3.2.15/16-479
16.3.2.16/16-480
16.3.2.19/16-482
16.3.2.15/16-479
16.3.2.11/16-476
16.3.2.2/16-468
16.3.2.3/16-469
16.3.2.4/16-470
16.3.2.8/16-473
16.4.2/16-485
16.4.3/16-485
16.1.2/16-462
16.4.3/16-485
16.4.3/16-485
S12XS Family Reference Manual, Rev. 1.11
Table 16-1. Revision History
- Revised flag clearing procedure, whereby TEN or PAEN bit must be set
when clearing flags.
- Add fomula to describe prescaler
- Correct typo: TSCR ->TSCR1
- Correct reference: Figure 1-25 -> Figure 1-31
- Add description, “a counter overflow when TTOV[7] is set”, to be the
condition of channel 7 override event.
- Phrase the description of OC7M to make it more explicit
- Add
- in TCRE bit description part,add Note
- Add
Table 16-10
Figure 16-31
Description of Changes
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