LFDAS12XSDT Freescale Semiconductor, LFDAS12XSDT Datasheet - Page 389

• Manufacturer Part Number: LFDAS12XSDT
• Description: HARDWARE MC9S12XS 52-PIN
• Manufacturer: Freescale Semiconductor

Specifications of LFDAS12XSDT

• Module/board Type: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: -

To calculate the output frequency in left aligned output mode for a particular channel, take the selected
clock source frequency for the channel (A, B, SA, or SB) and divide it by the value in the period register
for that channel.
As an example of a left aligned output, consider the following case:
The output waveform generated is shown in
Freescale Semiconductor
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•
•
Duty Cycle = [PWMDTYx / PWMPERx] * 100%
PWMx Frequency = Clock (A, B, SA, or SB) / PWMPERx
PWMx Duty Cycle (high time as a% of period):
— Polarity = 0 (PPOLx = 0)
Duty Cycle = [(PWMPERx-PWMDTYx)/PWMPERx] * 100%
— Polarity = 1 (PPOLx = 1)
Clock Source = E, where E = 10 MHz (100 ns period)
PWMx Frequency = 10 MHz/4 = 2.5 MHz
PWMx Period = 400 ns
PWMx Duty Cycle = 3/4 *100% = 75%
PPOLx = 0
PWMPERx = 4
PWMDTYx = 1
Changing the PWM output mode from left aligned to center aligned output
(or vice versa) while channels are operating can cause irregularities in the
PWM output. It is recommended to program the output mode before
enabling the PWM channel.
PPOLx = 0
PPOLx = 1
Figure 13-20. PWM Left Aligned Output Waveform
S12XS Family Reference Manual, Rev. 1.11
PWMDTYx
Figure
NOTE
Period = PWMPERx
13-21.
Pulse-Width Modulator (S12PWM8B8CV1)
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