LFDAS12XSDT Freescale Semiconductor, LFDAS12XSDT Datasheet - Page 104

• Manufacturer Part Number: LFDAS12XSDT
• Description: HARDWARE MC9S12XS 52-PIN
• Manufacturer: Freescale Semiconductor

Specifications of LFDAS12XSDT

• Module/board Type: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: -

1
Port Integration Module (S12XSPIMV1)
2.3.43
104
Address 0x0259
Read: Anytime.
Write:Never, writes to this register have no effect.
Field
Field
PTIP
PTP
PTP
Reset
7-0
1
0
W
R
Port P general purpose input/output data—Data Register, PWM output, routed TIM output, pin interrupt
input/output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port P general purpose input/output data—Data Register, PWM output, routed TIM output, routed SCI1 RXD
output, pin interrupt input/output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port P input data—
A read always returns the buffered input state of the associated pin. It can be used to detect overload or short circuit
conditions on output pins.
• The PWM function takes precedence over the TIM and general purpose I/O function if the related channel is
• The TIM function takes precedence over the general purpose I/O function if the related channel is enabled.
• Pin interrupts can be generated if enabled in input or output mode.
• The PWM function takes precedence over the TIM, SCI1 and general purpose I/O function if the related channel
• The TIM function takes precedence over SCI1 and the general purpose I/O function if the related channel is
• The SCI1 function takes precedence over the general purpose I/O function if enabled.
• Pin interrupts can be generated if enabled in input or output mode.
PTIP7
Port P Input Register (PTIP)
enabled.
is enabled.
enabled.
u
7
= Unimplemented or Reserved
PTIP6
Table 2-39. PTP Register Field Descriptions (continued)
u
6
Table 2-40. PTIP Register Field Descriptions
Figure 2-41. Port P Input Register (PTIP)
S12XS Family Reference Manual, Rev. 1.11
PTIP5
u
5
PTIP4
u
4
Description
Description
u = Unaffected by reset
PTIP3
3
u
PTIP2
u
2
Freescale Semiconductor
PTIP1
u
1
Access: User read
PTIP0
u
0
1