LFDAS12XSDT Freescale Semiconductor, LFDAS12XSDT Datasheet - Page 112

• Manufacturer Part Number: LFDAS12XSDT
• Description: HARDWARE MC9S12XS 52-PIN
• Manufacturer: Freescale Semiconductor

Specifications of LFDAS12XSDT

• Module/board Type: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: -

1
1
Port Integration Module (S12XSPIMV1)
2.3.57
2.3.58
112
Address 0x025F
Address 0x0268
7-6, 1-0
Read: Anytime.
Write: Anytime.
Read: Anytime. The data source depends on the data direction value.
Write: Anytime.
Field
Field
PIFH
Reset
Reset
PTJ
7-0
W
W
R
R
Port H interrupt flag—
The flag bit is set after an active edge was applied to the associated input pin. This can be a rising or a falling edge
based on the state of the polarity select register.
Writing a logic “1” to the corresponding bit field clears the flag.
1 Active edge on the associated bit has occurred (an interrupt will occur if the associated enable bit is set)
0 No active edge occurred
Port J general purpose input/output data—Data Register, pin interrupt input/output
The associated pin can be used as general purpose I/O. In general purpose output mode the register bit value is
driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• Pin interrupts can be generated if enabled in input or output mode.
PIFH7
PTJ7
Port H Interrupt Flag Register (PIFH)
Port J Data Register (PTJ)
0
0
7
7
PIFH6
PTJ6
0
0
6
6
Figure 2-55. Port H Interrupt Flag Register (PIFH)
Table 2-54. PIFH Register Field Descriptions
Table 2-55. PTJ Register Field Descriptions
Figure 2-56. Port J Data Register (PTJ)
S12XS Family Reference Manual, Rev. 1.11
PIFH5
0
0
0
5
5
PIFH4
0
0
0
4
4
Description
Description
PIFH3
3
0
3
0
0
PIFH2
0
0
0
2
2
Freescale Semiconductor
Access: User read/write
Access: User read/write
PIFH1
PTJ1
0
0
1
1
PIFH0
PTJ0
0
0
0
0
1
1