LFDAS12XSDT Freescale Semiconductor, LFDAS12XSDT Datasheet - Page 323

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LFDAS12XSDT

Manufacturer Part Number
LFDAS12XSDT
Description
HARDWARE MC9S12XS 52-PIN
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of LFDAS12XSDT

Module/board Type
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
-
Read:
Write:
Reset: Undefined because of RAM-based implementation
11.3.3.1
The identifier registers for an extended format identifier consist of a total of 32 bits: ID[28:0], SRR, IDE,
and RTR. The identifier registers for a standard format identifier consist of a total of 13 bits: ID[10:0],
RTR, and IDE.
Freescale Semiconductor
Register
Register
0x00X0
0x00X1
0x00X2
0x00X3
Name
Name
IDR0
IDR1
IDR2
IDR3
For transmit buffers, anytime when TXEx flag is set (see
Flag Register
Section 11.3.2.11, “MSCAN Transmit Buffer Selection Register
For receive buffers, only when RXF flag is set (see
Register
For transmit buffers, anytime when TXEx flag is set (see
Flag Register
Section 11.3.2.11, “MSCAN Transmit Buffer Selection Register
Unimplemented for receive buffers.
Figure 11-24. Receive/Transmit Message Buffer — Extended Identifier Mapping (continued)
Identifier Registers (IDR0–IDR3)
Figure 11-25. Receive/Transmit Message Buffer — Standard Identifier Mapping
W
W
W
W
R
R
R
R
(CANRFLG)”).
Bit 7
Bit 7
ID10
ID2
(CANTFLG)”) and the corresponding transmit buffer is selected in CANTBSEL (see
(CANTFLG)”) and the corresponding transmit buffer is selected in CANTBSEL (see
= Unused, always read ‘x’
= Unused, always read ‘x’
ID9
ID1
6
6
S12XS Family Reference Manual Rev. 1.11
ID8
ID0
5
5
RTR
ID7
4
4
Freescale’s Scalable Controller Area Network (S12MSCANV3)
Section 11.3.2.5, “MSCAN Receiver Flag
IDE (=0)
Section 11.3.2.7, “MSCAN Transmitter
Section 11.3.2.7, “MSCAN Transmitter
ID6
3
3
(CANTBSEL)”).
(CANTBSEL)”).
ID5
2
2
ID4
1
1
Bit 0
Bit0
ID3
323

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