LFDAS12XSDT Freescale Semiconductor, LFDAS12XSDT Datasheet - Page 315

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LFDAS12XSDT

Manufacturer Part Number
LFDAS12XSDT
Description
HARDWARE MC9S12XS 52-PIN
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of LFDAS12XSDT

Module/board Type
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
-
The IDHITx indicators are always related to the message in the foreground buffer (RxFG). When a
message gets shifted into the foreground buffer of the receiver FIFO the indicators are updated as well.
11.3.2.13 MSCAN Reserved Register
This register is reserved for factory testing of the MSCAN module and is not available in normal system
operating modes.
Freescale Semiconductor
IDHIT[2:0]
IDAM[1:0]
Field
5-4
2-0
Identifier Acceptance Mode — The CPU sets these flags to define the identifier acceptance filter organization
(see
mode, no message is accepted such that the foreground buffer is never reloaded.
Identifier Acceptance Hit Indicator — The MSCAN sets these flags to indicate an identifier acceptance hit (see
Section 11.4.3, “Identifier Acceptance
IDHIT2
IDAM1
Section 11.4.3, “Identifier Acceptance
0
0
1
1
0
0
0
0
1
1
1
1
Table 11-18. CANIDAC Register Field Descriptions
Table 11-19. Identifier Acceptance Mode Settings
Table 11-20. Identifier Acceptance Hit Indication
IDHIT1
IDAM0
S12XS Family Reference Manual Rev. 1.11
0
1
0
1
0
0
1
1
0
0
1
1
Filter”).
IDHIT0
Filter”).
0
1
0
1
0
1
0
1
Table 11-20
Description
Table 11-19
Identifier Acceptance Mode
Four 16-bit acceptance filters
Two 32-bit acceptance filters
Eight 8-bit acceptance filters
Freescale’s Scalable Controller Area Network (S12MSCANV3)
summarizes the different settings.
Filter closed
Identifier Acceptance Hit
summarizes the different settings. In filter closed
Filter 0 hit
Filter 1 hit
Filter 2 hit
Filter 3 hit
Filter 4 hit
Filter 5 hit
Filter 6 hit
Filter 7 hit
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