LFDAS12XSDT Freescale Semiconductor, LFDAS12XSDT Datasheet - Page 139

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LFDAS12XSDT

Manufacturer Part Number
LFDAS12XSDT
Description
HARDWARE MC9S12XS 52-PIN
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of LFDAS12XSDT

Module/board Type
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
-
3.3.2.7
Read: Anytime
Write: Anytime
These eight index bits are used to page 1KB blocks into the Data FLASH page window located in the local
(CPU or BDM) memory map from address 0x0800 to address 0x0BFF (see
accessing up to 256KB of Data FLASH (in the Global map) within the 64KB Local map. The Data FLASH
page index register is effectively used to construct paged Data FLASH addresses in the Local map format.
Freescale Semiconductor
Address: 0x0017
Reset
EP[7:0]
Field
7–0
W
R
EP7
0
Data FLASH Page Index Bits 7–0 — These page index bits are used to select which of the 256 Data FLASH
array pages is to be accessed in the Data FLASH Page Window.
Data FLASH Page Index Register (EPAGE)
1
7
0
EP6
1
Figure 3-15. Data FLASH Page Index Register (EPAGE)
1
6
0
S12XS Family Reference Manual, Rev. 1.11
Figure 3-16. EPAGE Address Mapping
Table 3-9. EPAGE Field Descriptions
0
EP5
1
5
Bit17
Global Address [22:0]
Bit16
EPAGE Register [7:0]
EP4
1
4
Description
EP3
1
3
Bit10
Address: CPU Local Address
Bit9
EP2
Memory Mapping Control (S12XMMCV4)
or BDM Local Address
1
2
Figure
Address [9:0]
3-16). This supports
EP1
1
1
Bit0
EP0
0
0
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