LFDAS12XSDT Freescale Semiconductor, LFDAS12XSDT Datasheet - Page 394

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LFDAS12XSDT

Manufacturer Part Number
LFDAS12XSDT
Description
HARDWARE MC9S12XS 52-PIN
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of LFDAS12XSDT

Module/board Type
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
-
Pulse-Width Modulator (S12PWM8B8CV1)
Either left aligned or center aligned output mode can be used in concatenated mode and is controlled by
the low order CAEx bit. The high order CAEx bit has no effect.
Table 13-11
mode.
13.4.2.8
Table 13-12
or center aligned) and 8-bit (normal) or 16-bit (concatenation).
13.5
The reset state of each individual bit is listed within the
details the registers and their bit-fields. All special functions or modes which are initialized during or just
following reset are described within this section.
394
The 8-bit up/down counter is configured as an up counter out of reset.
All the channels are disabled and all the counters do not count.
Resets
summarizes the boundary conditions for the PWM regardless of the output mode (left aligned
is used to summarize which channels are used to set the various control bits when in 16-bit
1
PWM Boundary Cases
Counter = $00 and does not count.
(indicates no duty)
(indicates no duty)
CONxx
CON67
CON45
CON23
CON01
>= PWMPERx
>= PWMPERx
PWMDTYx
$00
$00
XX
XX
Table 13-11. 16-bit Concatenation Mode Summary
PWMEx
PWME7
PWME5
PWME3
PWME1
S12XS Family Reference Manual, Rev. 1.11
Table 13-12. PWM Boundary Cases
(indicates no period)
(indicates no period)
PWMPERx
PPOLx
PPOL7
PPOL5
PPOL3
PPOL1
>$00
>$00
$00
$00
XX
XX
1
1
PCLKx
Section 13.3.2, “Register Descriptions”
PCLK7
PCLK5
PCLK3
PCLK1
PPOLx
1
0
1
0
1
0
CAEx
CAE7
CAE5
CAE3
CAE1
PWMx Output
Always high
Always high
Always high
Always low
Always low
Always low
Output
PWMx
PWM7
PWM5
PWM3
PWM1
Freescale Semiconductor
which

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