AC162078 Microchip Technology, AC162078 Datasheet - Page 74

HEADER INTRFC MPLAB ICD2 18F1330

AC162078

Manufacturer Part Number
AC162078
Description
HEADER INTRFC MPLAB ICD2 18F1330
Manufacturer
Microchip Technology
Datasheet

Specifications of AC162078

Accessory Type
Transition Header
Lead Free Status / RoHS Status
Not applicable / Not applicable
For Use With/related Products
ICD2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Not applicable / Not applicable

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Part Number:
AC162078
Manufacturer:
MICROCHIP
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PIC18F1230/1330
7.2.2
The Table Latch (TABLAT) is an 8-bit register mapped
into the SFR space. The Table Latch register is used to
hold 8-bit data during data transfers between program
memory and data RAM.
7.2.3
The Table Pointer (TBLPTR) register addresses a byte
within the program memory. The TBLPTR is comprised
of three SFR registers: Table Pointer Upper Byte,
Table Pointer High Byte and Table Pointer Low Byte
(TBLPTRU:TBLPTRH:TBLPTRL).
registers join to form a 22-bit wide pointer. The low-
order 21 bits allow the device to address up to
2 Mbytes of program memory space. The 22nd bit
allows access to the device ID, the user ID and the
Configuration bits.
The Table Pointer register, TBLPTR, is used by the
TBLRD and TBLWT instructions. These instructions can
update the TBLPTR in one of four ways based on the
table operation. These operations are shown in
Table 7-1. These operations on the TBLPTR only affect
the low-order 21 bits.
TABLE 7-1:
FIGURE 7-3:
DS39758D-page 74
TBLRD*
TBLWT*
TBLRD*+
TBLWT*+
TBLRD*-
TBLWT*-
TBLRD+*
TBLWT+*
Example
21
TABLAT – TABLE LATCH REGISTER
TBLPTR – TABLE POINTER
REGISTER
TABLE POINTER OPERATIONS WITH TBLRD AND TBLWT INSTRUCTIONS
TBLPTRU
TABLE POINTER BOUNDARIES BASED ON OPERATION
16
15
These
TABLE ERASE
TBLPTR<21:6>
TBLPTR is incremented before the read/write
TBLPTR is decremented after the read/write
TBLPTR is incremented after the read/write
three
TBLPTRH
Operation on Table Pointer
TBLPTR<21:3>
TABLE WRITE
TBLPTR is not modified
7.2.4
TBLPTR is used in reads, writes and erases of the
Flash program memory.
When a TBLRD is executed, all 22 bits of the TBLPTR
determine which byte is read from program memory
into TABLAT.
When the timed write to program memory begins (via
the WR bit), the 19 MSbs of the TBLPTR
(TBLPTR<21:3>) determine which program memory
block of 8 bytes is written to. The Table Pointer regis-
ter’s three LSBs (TBLPTR<2:0>) are ignored. For more
detail, see Section 7.5 “Writing to Flash Program
Memory”.
When an erase of program memory is executed, the
16 MSbs of the Table Pointer register (TBLPTR<21:6>)
point to the 64-byte block that will be erased. The Least
Significant bits (TBLPTR<5:0>) are ignored.
Figure 7-3 describes the relevant boundaries of
TBLPTR based on Flash program memory operations.
TABLE READ – TBLPTR<21:0>
8
7
TABLE POINTER BOUNDARIES
TBLPTRL
 2009 Microchip Technology Inc.
0

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