AC162078 Microchip Technology, AC162078 Datasheet - Page 140

• Manufacturer Part Number: AC162078
• Description: HEADER INTRFC MPLAB ICD2 18F1330
• Manufacturer: Microchip Technology

Specifications of AC162078

• Accessory Type: Transition Header
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• For Use With/related Products: ICD2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Not applicable / Not applicable

PIC18F1230/1330
14.10.3
Figure 14-21 shows an example of a waveform that
might be generated using the PWM output override
feature. The figure shows a six-step commutation
sequence for a BLDC motor. The motor is driven
through a 3-phase inverter as shown in Figure 14-16.
When the appropriate rotor position is detected, the
PWM outputs are switched to the next commutation
state in the sequence. In this example, the PWM
outputs are driven to specific logic states. The
OVDCOND and OVDCONS register values used to
generate the signals in Figure 14-21 are given in
Table 14-4.
REGISTER 14-6:
REGISTER 14-7:
DS39758D-page 140
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-0
U-0
U-0
—
—
OUTPUT OVERRIDE EXAMPLES
Unimplemented: Read as ‘0’
POVD5:POVD0: PWM Output Override bits
1 = Output on PWM I/O pin is controlled by the value in the Duty Cycle register and the PWM time base
0 = Output on PWM I/O pin is controlled by the value in the corresponding POUTx bit
Unimplemented: Read as ‘0’
POUT5:POUT0: PWM Manual Output bits
1 = Output on PWM I/O pin is active when the corresponding PWM output override bit is cleared
0 = Output on PWM I/O pin is inactive when the corresponding PWM output override bit is cleared
Note 1: With PWMs configured in complementary mode, even PWM (PWM0, 2, 4) outputs will be
U-0
U-0
—
—
OVDCOND: OUTPUT OVERRIDE CONTROL REGISTER
OVDCONS: OUTPUT STATE REGISTER
complementary of the odd PWM (PWM1, 3, 5) outputs, irrespective of the POUT bit
setting.
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
POVD5
POUT5
R/W-1
R/W-0
POVD4
POUT4
R/W-1
R/W-0
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
POVD3
POUT3
R/W-1
R/W-0
The PWM Duty Cycle registers may be used in
conjunction with the OVDCOND and OVDCONS
registers. The Duty Cycle registers control the average
voltage across the load and the OVDCOND and
OVDCONS
sequence. Figure 14-22 shows the waveforms, while
Table 14-4 and Table 14-5 show the OVDCOND and
OVDCONS register values used to generate the
signals.
POVD2
POUT2
registers
R/W-1
R/W-0
 2009 Microchip Technology Inc.
control
x = Bit is unknown
x = Bit is unknown
POVD1
POUT1
R/W-1
R/W-0
the
commutation
POVD0
POUT0
R/W-1
R/W-0
bit 0
bit 0