AC162078 Microchip Technology, AC162078 Datasheet - Page 136

HEADER INTRFC MPLAB ICD2 18F1330

AC162078

Manufacturer Part Number
AC162078
Description
HEADER INTRFC MPLAB ICD2 18F1330
Manufacturer
Microchip Technology
Datasheet

Specifications of AC162078

Accessory Type
Transition Header
Lead Free Status / RoHS Status
Not applicable / Not applicable
For Use With/related Products
ICD2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Not applicable / Not applicable

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AC162078
Manufacturer:
MICROCHIP
Quantity:
12 000
PIC18F1230/1330
REGISTER 14-5:
14.7.2
The amount of dead time provided by the dead-time
unit is selected by specifying the input clock prescaler
value and a 6-bit unsigned value defined in the DTCON
register. Four input clock prescaler selections have
been provided to allow a suitable range of dead times
based on the device operating frequency. F
F
options available using the DTPS1:DTPS0 control bits
in the DTCON register.
After selecting an appropriate prescaler value, the
dead time is adjusted by loading a 6-bit unsigned value
into DTCON<5:0>. The dead-time unit prescaler is
cleared on any of the following events:
• On a load of the down timer due to a duty cycle
• On a write to the DTCON register; or
• On any device Reset.
DS39758D-page 136
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-0
OSC
comparison edge event;
DTPS1
R/W-0
/4, F
OSC
DEAD-TIME RANGES
/8 and F
DTPS1:DTPS0: Dead-Time Unit A Prescale Select bits
11 = Clock source for dead-time unit is F
10 = Clock source for dead-time unit is F
01 = Clock source for dead-time unit is F
00 = Clock source for dead-time unit is F
DT5:DT0: Unsigned 6-Bit Dead-Time Value for Dead-Time Unit bits
DTPS0
R/W-0
DTCON: DEAD-TIME CONTROL REGISTER
OSC
/16 are the clock prescaler
W = Writable bit
‘1’ = Bit is set
R/W-0
DT5
OSC
R/W-0
DT4
/2,
OSC
OSC
OSC
OSC
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
/16
/8
/4
/2
R/W-0
14.7.3
The dead-time counter is clocked from any of the
Q clocks based on the following conditions.
1.
2.
3.
4.
DT3
The dead-time counter is clocked on Q1 when:
• The DTPS bits are set to any of the following
• The PWM Time Base Prescale bits
The dead-time counter is clocked by a pair of
Q clocks when the PWM Time Base Prescale
bits are set to 1:1 (PTCKPS<1:0> = 00, F
and the dead-time counter is clocked by the
F
The dead-time counter is clocked using every
other Q clock, depending on the two LSbs in the
Duty Cycle registers:
• If the PWM duty cycle match occurs on Q1 or
• If the PWM duty cycles match occurs on Q2
When the DTPS<1:0> bits are set to any of the
other dead-time prescaler settings (i.e., F
F
caler is set to 1:1, the dead-time counter is clocked
by the Q clock corresponding to the Q clocks on
which the PWM duty cycle match occurs.
OSC
OSC
dead-time prescaler settings: F
F
(PTCKPS<1:0>) are set to any of the following
prescale ratios: F
Q3, then the dead-time counter is clocked
using every Q1 and Q3
or Q4, then the dead-time counter is clocked
using every Q2 and Q4
OSC
/8 or F
/2 (DTPS<1:0> = 00).
DECREMENTING THE DEAD-TIME
COUNTER
/8, F
R/W-0
DT2
OSC
OSC
/16) and the PWM time base pres-
/16
OSC
 2009 Microchip Technology Inc.
x = Bit is unknown
/16, F
R/W-0
DT1
OSC
/64, F
OSC
/4,
OSC
R/W-0
DT0
OSC
OSC
/256
bit 0
/4)
/4,

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