Z8F041APH020SG2156 ZiLOG, Z8F041APH020SG2156 Datasheet - Page 64

• Manufacturer Part Number: Z8F041APH020SG2156
• Description: 8-bit Microcontrollers - MCU 4K FLASH 1K RAM 128B NVDS
• Manufacturer: ZiLOG

Specifications of Z8F041APH020SG2156

• Rohs: yes
• Core: eZ8
• Processor Series: Z8F041xx
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 4 KB
• Data Ram Size: 1 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.7 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: PDIP-20
• Mounting Style: Through Hole
• A/d Bit Size: 10 bit
• A/d Channels Available: 8
• Interface Type: UART
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 17
• Number Of Timers: 2
• Program Memory Type: Flash
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V

PS022827-1212
Bit
Field
RESET
R/W
Address
Bit
[7:0]
AFx
Note: x indicates the specific GPIO port pin number (7–0).
Caution:
Port A–D Alternate Function Subregisters
Description
Port Alternate Function Enabled
0 = The port pin is in normal mode and the DDx bit in the Port A–D Data Direction subregister
1 = The alternate function selected through Alternate Function Set subregisters is enabled.
AF7
If 02H in Port A–D Address Register, accessible through the Port A–D Control Register
determines the direction of the pin.
Port pin operation is controlled by the alternate function.
7
The Port A–D Alternate Function Subregister, shown in Table 22, is accessed through the
Port A–D Control Register by writing
D Alternate Function subregisters enable the alternate function selection on pins. If dis-
abled, pins functions as GPIO. If enabled, select one of four alternate functions using
alternate function set subregisters 1 and 2 as described in the
Function Set 1 Subregisters
page 37 and
the
ciated with each port pin.
Port A–D Output Control Subregisters
The Port A–D Output Control Subregister, shown in Table 23, is accessed through the Port
A–D Control Register by writing
the Port A–D Output Control subregisters to 1 configures the specified port pins for open-
drain operation. These subregisters affect the pins directly and, as a result, alternate func-
tions are also affected.
Do not enable alternate functions for GPIO port pins for which there is no associated al-
ternate function. Failure to follow this guideline can result in unpredictable operation.
GPIO Alternate Functions
Table 22. Port A–D Alternate Function Subregisters (PxAF)
AF6
6
00H (Ports A–C); 01H (Port D); 04H (Port A of 8-pin device)
the
Port A–D Alternate Function Set 2 Subregisters
AF5
5
P R E L I M I N A R Y
section on page 50
section on page 37 to determine the alternate function asso-
03H
AF4
4
to the Port A–D Address Register. Setting the bits in
02H
R/W
to the Port A–D Address Register. The Port A–
AF3
3
, the
GPIO Alternate Functions
Z8 Encore! XP
GPIO Control Register Definitions
AF2
2
the
Product Specification
section on page 51.
Port A–D Alternate
AF1
1
®
F082A Series
section on
AF0
0
See
47