Z8F041APH020SG2156 ZiLOG, Z8F041APH020SG2156 Datasheet - Page 130
Z8F041APH020SG2156
Manufacturer Part Number
Z8F041APH020SG2156
Description
8-bit Microcontrollers - MCU 4K FLASH 1K RAM 128B NVDS
Manufacturer
ZiLOG
Datasheet
1.Z8F082ASJ020EG2156.pdf
(282 pages)
Specifications of Z8F041APH020SG2156
Rohs
yes
Core
eZ8
Processor Series
Z8F041xx
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Program Memory Size
4 KB
Data Ram Size
1 KB
On-chip Adc
Yes
Operating Supply Voltage
2.7 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
PDIP-20
Mounting Style
Through Hole
A/d Bit Size
10 bit
A/d Channels Available
8
Interface Type
UART
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
17
Number Of Timers
2
Program Memory Type
Flash
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
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PS022827-1212
Bit
[2]
BRGCTL
[1]
RDAIRQ
[0]
IREN
Description (Continued)
Baud Rate Control
This bit causes an alternate UART behavior depending on the value of the REN bit in the
UART Control 0 Register. When the UART receiver is not enabled (REN=0), this bit deter-
mines whether the Baud Rate Generator issues interrupts.
0 = Reads from the Baud Rate High and Low Byte registers return the BRG reload value.
1 = The Baud Rate Generator generates a receive interrupt when it counts down to 0.
When the UART receiver is enabled (REN=1), this bit allows reads from the Baud Rate reg-
isters to return the BRG count value instead of the reload value.
0 = Reads from the Baud Rate High and Low Byte registers return the BRG reload value.
1 = Reads from the Baud Rate High and Low Byte registers return the current BRG count
Receive Data Interrupt Enable
0 = Received data and receiver errors generates an interrupt request to the Interrupt Con-
1 = Received data does not generate an interrupt request to the Interrupt Controller. Only
Infrared Encoder/Decoder Enable
0 = Infrared Encoder/Decoder is disabled. UART operates normally.
1 = Infrared Encoder/Decoder is enabled. The UART transmits and receives data through
Reads from the Baud Rate High and Low Byte registers return the current BRG count
value.
value. Unlike the Timers, there is no mechanism to latch the Low Byte when the High
Byte is read.
troller.
receiver errors generate an interrupt request.
the Infrared Encoder/Decoder.
P R E L I M I N A R Y
Z8 Encore! XP
UART Control Register Definitions
Product Specification
®
F082A Series
113
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