Z8F041APH020SG2156 ZiLOG, Z8F041APH020SG2156 Datasheet - Page 203

• Manufacturer Part Number: Z8F041APH020SG2156
• Description: 8-bit Microcontrollers - MCU 4K FLASH 1K RAM 128B NVDS
• Manufacturer: ZiLOG

Specifications of Z8F041APH020SG2156

• Rohs: yes
• Core: eZ8
• Processor Series: Z8F041xx
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 4 KB
• Data Ram Size: 1 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.7 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: PDIP-20
• Mounting Style: Through Hole
• A/d Bit Size: 10 bit
• A/d Channels Available: 8
• Interface Type: UART
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 17
• Number Of Timers: 2
• Program Memory Type: Flash
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V

PS022827-1212
Debug Command
Read OCD Revision
Reserved
Read OCD Status Register
Read Runtime Counter
Write OCD Control Register
Read OCD Control Register
On-Chip Debugger Commands
Runtime Counter
enabled, the OCD ignores the BRK signal and the
instruction.
Breakpoints in Flash Memory
The
byte in Flash memory. To implement a Breakpoint, write
address, overwriting the current instruction. To remove a Breakpoint, the corresponding
page of Flash memory must be erased and reprogrammed with the original data.
The On-Chip Debugger contains a 16-bit Runtime Counter. It counts system clock cycles
between Breakpoints. The counter starts counting when the On-Chip Debugger leaves
DEBUG Mode and stops counting when it enters DEBUG Mode again or when it reaches
the maximum count of
The host communicates to the on-chip debugger by sending OCD commands using the
DBG interface. During normal operation, only a subset of the OCD commands are avail-
able. In DEBUG Mode, all OCD commands become available unless the user code and
control registers are protected by programming the Flash Read Protect Option bit (FRP).
The Flash Read Protect Option bit prevents the code in memory from being read out of the
Z8 Encore! XP F082A Series device. When this option is enabled, several of the OCD
commands are disabled. See Table 109.
Table 110
mand is described in further detail in the bulleted list following this table. Table 110 also
indicates those commands that operate when the device is not in DEBUG Mode (normal
operation) and those commands that are disabled by programming the Flash Read Protect
Option bit.
BRK
instruction is opcode
on page 191 is a summary of the on-chip debugger commands. Each OCD com-
Table 109. Debug Command Enable/Disable
Command
Byte
00H
01H
02H
03H
04H
05H
FFFFH
P R E L I M I N A R Y
.
Enabled when
Not in DEBUG
00H
Mode?
, which corresponds to the fully programmed state of a
Yes
Yes
Yes
Yes
–
–
Disabled by Flash Read Protect
Option Bit
–
–
–
–
Cannot clear DBGMODE bit.
–
BRK
Z8 Encore! XP
instruction operates as an NOP
00H
On-Chip Debugger Commands
to the required break
Product Specification
®
F082A Series
186