Z8F041APH020SG2156 ZiLOG, Z8F041APH020SG2156 Datasheet - Page 127

• Manufacturer Part Number: Z8F041APH020SG2156
• Description: 8-bit Microcontrollers - MCU 4K FLASH 1K RAM 128B NVDS
• Manufacturer: ZiLOG

Specifications of Z8F041APH020SG2156

• Rohs: yes
• Core: eZ8
• Processor Series: Z8F041xx
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 4 KB
• Data Ram Size: 1 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.7 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: PDIP-20
• Mounting Style: Through Hole
• A/d Bit Size: 10 bit
• A/d Channels Available: 8
• Interface Type: UART
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 17
• Number Of Timers: 2
• Program Memory Type: Flash
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V

PS022827-1212
UART Control Register Definitions
UART Baud Rate Generator
UART Control 0 and Control 1 Registers
Rate Generator to function as an additional counter if the UART functionality is not
employed.
The UART Baud Rate Generator creates a lower frequency baud rate clock for data trans-
mission. The input to the Baud Rate Generator is the system clock. The UART Baud Rate
High and Low Byte registers combine to create a 16-bit baud rate divisor value
(BRG[15:0]) that sets the data transmission rate (baud rate) of the UART. The UART data
rate is calculated using the following equation:
When the UART is disabled, the Baud Rate Generator functions as a basic 16-bit timer
with an interrupt upon time-out. Observe the following steps to configure the Baud Rate
Generator as a timer with an interrupt upon time-out:
1. Disable the UART by clearing the REN and TEN bits in the UART Control 0 Register
2. Load the acceptable 16-bit count value into the UART Baud Rate High and Low Byte
3. Enable the Baud Rate Generator timer function and associated interrupt by setting the
When configured as a general purpose timer, the interrupt interval is calculated using the
following equation:
The UART Control registers support the UART and the associated Infrared Encoder/
Decoders. For more information about infrared operation, see the
Decoder
The UART Control 0 (UxCTL0) and Control 1 (UxCTL1) registers, shown in Tables 63
and 64, configure the properties of the UART’s transmit and receive operations. The
UART Control registers must not be written while the UART is enabled.
UART Data Rate (bits/s)
Interrupt Interval s  
to 0.
registers.
BRGCTL bit in the UART Control 1 Register to 1.
chapter on page 120.
=
System Clock Period (s) BRG 15:0
=
P R E L I M I N A R Y
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16

System Clock Frequency (Hz)
UART Baud Rate Divisor Value


Z8 Encore! XP
UART Control Register Definitions

Product Specification
Infrared Encoder/
®
F082A Series
110