Z8F041APH020SG2156 ZiLOG, Z8F041APH020SG2156 Datasheet - Page 180

• Manufacturer Part Number: Z8F041APH020SG2156
• Description: 8-bit Microcontrollers - MCU 4K FLASH 1K RAM 128B NVDS
• Manufacturer: ZiLOG

Specifications of Z8F041APH020SG2156

• Rohs: yes
• Core: eZ8
• Processor Series: Z8F041xx
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 4 KB
• Data Ram Size: 1 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.7 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: PDIP-20
• Mounting Style: Through Hole
• A/d Bit Size: 10 bit
• A/d Channels Available: 8
• Interface Type: UART
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 17
• Number Of Timers: 2
• Program Memory Type: Flash
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V

PS022827-1212
Bit
[5:4]
OSC_SEL[1:0]
[3]
VBO_AO
[2]
FRP
[1]
[0]
FWP
Description (Continued)
Oscillator Mode Selection
00 = On-chip oscillator configured for use with external RC networks (<4 MHz).
01 = Minimum power for use with very low frequency crystals (32 kHz to 1.0 MHz).
10 = Medium power for use with medium frequency crystals or ceramic resonators
11 = Maximum power for use with high frequency crystals (5.0 MHz to 20.0 MHz). This
Voltage Brown-Out Protection Always On
0 = Voltage Brown-Out Protection can be disabled in STOP Mode to reduce total power
1 = Voltage Brown-Out Protection is always enabled including during STOP Mode. This
Flash Read Protect
0 = User program code is inaccessible. Limited control features are available through the
1 = User program code is accessible. All On-Chip Debugger commands are enabled.
Reserved
This bit is reserved and must be programmed to 1.
Flash Write Protect
This Option Bit provides Flash Program Memory protection:
0 = Programming and erasure disabled for all of Flash Program Memory. Programming,
1 = Programming, Page Erase and Mass Erase are enabled for all of Flash program
consumption. For the block to be disabled, the power control register bit must also be
written (see the
setting is the default for unprogrammed (erased) Flash.
On-Chip Debugger.
This setting is the default for unprogrammed (erased) Flash.
Page Erase and Mass Erase through User Code is disabled. Mass Erase is available
using the On-Chip Debugger.
memory.
(0.5 MHz to 5.0 MHz).
setting is the default for unprogrammed (erased) Flash.
Power Control Register Definitions
P R E L I M I N A R Y
Z8 Encore! XP
section on page 33).
Flash Option Bit Address Space
Product Specification
®
F082A Series
163