Z8F041APH020SG2156 ZiLOG, Z8F041APH020SG2156 Datasheet - Page 99

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Z8F041APH020SG2156

Manufacturer Part Number
Z8F041APH020SG2156
Description
8-bit Microcontrollers - MCU 4K FLASH 1K RAM 128B NVDS
Manufacturer
ZiLOG
Datasheet

Specifications of Z8F041APH020SG2156

Rohs
yes
Core
eZ8
Processor Series
Z8F041xx
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Program Memory Size
4 KB
Data Ram Size
1 KB
On-chip Adc
Yes
Operating Supply Voltage
2.7 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
PDIP-20
Mounting Style
Through Hole
A/d Bit Size
10 bit
A/d Channels Available
8
Interface Type
UART
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
17
Number Of Timers
2
Program Memory Type
Flash
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
PS022827-1212
2. Write to the Timer High and Low Byte registers to set the starting count value.
3. Write to the Timer Reload High and Low Byte registers to set the Compare value.
4. Enable the timer interrupt, if appropriate and set the timer interrupt priority by writing
5. If using the Timer Output function, configure the associated GPIO port pin for the
6. Write to the Timer Control Register to enable the timer and initiate counting.
In COMPARE Mode, the system clock always provides the timer input. The Compare
time can be calculated by the following equation:
GATED Mode
In GATED Mode, the timer counts only when the Timer Input signal is in its active state
(asserted), as determined by the TPOL bit in the Timer Control Register. When the Timer
Input signal is asserted, counting begins. A timer interrupt is generated when the Timer
Input signal is deasserted or a timer reload occurs. To determine if a Timer Input signal
deassertion generated the interrupt, read the associated GPIO input value and compare to
the value stored in the TPOL bit.
The timer counts up to the 16-bit reload value stored in the Timer Reload High and Low
Byte registers. The timer input is the system clock. When reaching the reload value, the
timer generates an interrupt, the count value in the Timer High and Low Byte registers is
reset to
Also, if the Timer Output alternate function is enabled, the Timer Output pin changes state
(from Low to High or from High to Low) at timer reset.
Observe the following steps for configuring a timer for GATED Mode and initiating the
count:
1. Write to the Timer Control Register to:
COMPARE Mode Time (s)
to the relevant interrupt registers.
Timer Output alternate function.
0001H
Set the initial logic level (High or Low) for the Timer Output alternate function, if
appropriate
Disable the timer
and counting resumes (assuming the Timer Input signal remains asserted).
P R E L I M I N A R Y
=
-----------------------------------------------------------------------------------------------------
Compare Value Start Value
System Clock Frequency (Hz)
Z8 Encore! XP
Product Specification
Prescale
®
F082A Series
Operation
82

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