MPC8313EZQADDC Freescale Semiconductor, MPC8313EZQADDC Datasheet - Page 810
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MPC8313EZQADDC
Manufacturer Part Number
MPC8313EZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB W/ENC
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8313CZQADDC.pdf
(1214 pages)
Specifications of MPC8313EZQADDC
Processor Series
MPC8313E
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4
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Enhanced Three-Speed Ethernet Controllers
15.5.3.6.26 Transmit Packet Counter (TPKT)
Figure 15-77
Table 15-81
15.5.3.6.27 Transmit Multicast Packet Counter (TMCA)
Figure 15-78
Table 15-82
15-92
10–31
10–31 TPKT Transmit packet counter. Increments for each transmitted packet (including bad packets, excessive deferred
Bits
0–9
Bits
0–9
Offset eTSEC1:0x2_46E4; eTSEC2:0x2_56E4
Reset
Offset eTSEC1:0x2_46E8; eTSEC2:0x2_56E8
Reset
W
W
R
R
Name
TMCA
Name
—
—
0
0
describes the fields of the TPKT register.
describes the fields of the TMCA register.
describes the definition for the TPKT register.
describes the definition for the TMCA register.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Reserved
packets, excessive collision packets, late collision packets, all unicast, broadcast, and multicast packets).
Reserved
Transmit multicast packet counter. Increments for each multicast valid frame transmitted (excluding broadcast
frames) with valid CRC and of lengths 64 to 1518 (non VLAN) or 1522 (VLAN).
Figure 15-78. Transmit Multicast Packet Counter Register Definition
—
—
Figure 15-77. Transmit Packet Counter Register Definition
Table 15-82. TMCA Field Descriptions
Table 15-81. TPKT Field Descriptions
9
9
10
10
All zeros
All zeros
Description
Description
TMCA
TPKT
Freescale Semiconductor
Access: Read/Write
Access: Read/Write
31
31
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