MPC8313EZQADDC Freescale Semiconductor, MPC8313EZQADDC Datasheet - Page 717
MPC8313EZQADDC
Manufacturer Part Number
MPC8313EZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB W/ENC
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8313CZQADDC.pdf
(1214 pages)
Specifications of MPC8313EZQADDC
Processor Series
MPC8313E
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4
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14.6.6
The SEC generates a single interrupt to the MPC8313E programmable interrupt controller. The user
allows interrupts from the SEC to be reported to the CPU by setting the mask bit in SIMSR_H[SEC].
The user can control which events cause an interrupt by configuring the SEC interrupt mask register
(IMR). These events are:
When the user detects an interrupt request from the SEC, it should further read the SEC interrupt status
register (ISR) to determine the source of that interrupt. To clear an interrupt, the user should write 1 to the
bits in the SEC interrupt clear register (ICR) corresponding to the pending ISR bits.
Events may be further masked per channel by setting or clearing the related fields in the crypto-channel
configuration registers. It is suggested that the user leave channel interrupts unmasked, while masking the
interrupts from the EUs. Errors or Done signals coming from the EUs eventually cause the channel to
signal an error or Done interrupt. Clearing an interrupt before eliminating the condition which caused the
interrupt will cause the interrupt to be asserted again a few cycles later.
14.7
The SEC can be disabled by clearing SCCR[ENCCM]. See
Register (SCCR),”
Freescale Semiconductor
•
•
Done (of a channel or an execution unit)
Error (of a channel or an execution unit)
Power Saving Mode
Interrupts
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
for more information.
Section 4.5.2.3, “System Clock Control
Security Engine (SEC) 2.2
14-75
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