MPC8313EZQADDC Freescale Semiconductor, MPC8313EZQADDC Datasheet - Page 559
MPC8313EZQADDC
Manufacturer Part Number
MPC8313EZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB W/ENC
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8313CZQADDC.pdf
(1214 pages)
Specifications of MPC8313EZQADDC
Processor Series
MPC8313E
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4
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11.5.1.1
Transactions from the CSB port are forwarded as follows:
11.5.1.2
Transactions from the PCI port are forwarded as follows:
11.5.1.3
Transactions from the DMA port are forwarded as follows:
11.5.2
Outbound address translation is provided to allow the outbound transactions to access any address over the
PCI memory or I/O space. Translation window base addresses are defined in the PCI outbound base
address registers. See
information. Transactions to these address ranges are issued on the PCI bus with a translated address. The
translation addresses are defined in the associated PCI outbound translation address registers (POTARs).
Freescale Semiconductor
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If the address matches the 12-byte PCI controller software configuration memory space of the PCI
controller, the transaction is forwarded to the PCI port. These address values are configuration
options of the I/O sequencer. See
configuration memory space.
If the address matches the DMA register memory space, the transaction is forwarded to the DMA
port.
If the address hits any of the outbound translation windows, the transaction is forwarded to the PCI
port, with the address translated. See
more information.
If the address matches the DMA register memory space, the transaction is forwarded to the DMA
port.
All other transactions are forwarded to the CSB port.
If the address hits any of the outbound translation windows, the transaction is forwarded to the PCI
port, with the address translated. See
more information.
All other transactions are forwarded to the CSB port.
PCI Outbound Address Translation
Transactions from the Coherency System Bus (CSB) Port
Transactions from the PCI Port
Transactions from the DMA Port
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Section 11.4.2, “PCI Outbound Base Address Registers (POBARn),”
Table 13-3
Section 11.5.2, “PCI Outbound Address Translation,”
Section 11.5.2, “PCI Outbound Address Translation,”
for more information on PCI controller software
for more
Sequencer
for
for
11-7
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