MPC8313EZQADDC Freescale Semiconductor, MPC8313EZQADDC Datasheet - Page 232
MPC8313EZQADDC
Manufacturer Part Number
MPC8313EZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB W/ENC
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8313CZQADDC.pdf
(1214 pages)
Specifications of MPC8313EZQADDC
Processor Series
MPC8313E
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4
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System Configuration
Table 5-29
pin used in this option. Some groups have only two options (shown as Pin Function 0 and Pin Function 1)
and therefore, only one control bit. In this case they can have the value of 0b0 or 0b1 only. Other groups
may have three options (shown as Pin Function 0, Pin Function 1, and Pin Function 2) and therefore, two
control bits. In this case they can have the value of 0b00, 0b01, or 0b10. A value of 0b11 is illegal for all
groups. Use the 0bN or 0bNN notations according to a group having one or two control bits, respectively.
Note that bits 30 and 31 (TSOBI1 and TSOBI2), which control TSEC output buffer impedance, are
described in
SICRH[Bits] Value:
5-24
Offset 0x00118
Reset
Reset
Reset
Reset
Bits
0–5
6
W
W
W
W
R
R
R
R
ETSEC1_B
Reserved
INTR_A
Group
defines the bit fields of SICRH. Each Pin Function column lists the name of the multi-function
16
24
0
8
Table 5-30
ETSEC2_D
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
INTR_B
Pin Function 0
0b0/0b00
Figure 5-15. System I/O Configuration Register High (SICRH)
IRQ_B3
17
25
1
9
—
ETSEC1_C
10
18
26
2
Table 5-29. SICRH Bit Settings
Pin Function 1
ETSEC2_E
CKSTOP_OUT
0b1/0b01
IIC
—
Depends on reset configuration
Depends on reset configuration
Depends on reset configuration
Depends on reset configuration
—
—
11
19
27
3
Pin Function 2
—
12
20
28
4
ETSEC2_B
ETSEC2_F
0b10
—
—
—
13
21
29
5
Pin Function 3
INTR_A
TSOBI1
Freescale Semiconductor
14
22
30
0b11
6
—
—
ETSEC2_C
ETSEC2_G
Access: Read/Write
TSOBI2
—
15
23
31
7
Reset
Value
0
0
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