S912XET512J3VALR Freescale Semiconductor, S912XET512J3VALR Datasheet - Page 955
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S912XET512J3VALR
Manufacturer Part Number
S912XET512J3VALR
Description
16-bit Microcontrollers - MCU 16 BIT,512K FLASH
Manufacturer
Freescale Semiconductor
Datasheet
1.S912XEG128J2MAL.pdf
(1324 pages)
Specifications of S912XET512J3VALR
Rohs
yes
Core
HCS12X
Processor Series
MC9S12XE
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
32 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-112
Mounting Style
SMD/SMT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S912XET512J3VALR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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EEE (Emulated EEPROM) — A method to emulate the small sector size features and endurance
characteristics associated with an EEPROM.
EEE IFR — Nonvolatile information register located in the D-Flash block that contains data required to
partition the D-Flash memory and buffer RAM for EEE. The EEE IFR is visible in the global memory map
by setting the EEEIFRON bit in the MMCCTL1 register.
NVM Command Mode — An NVM mode using the CPU to setup the FCCOB register to pass parameters
required for Flash command execution.
Phrase — An aligned group of four 16-bit words within the P-Flash memory. Each phrase includes eight
ECC bits for single bit fault correction and double bit fault detection within the phrase.
P-Flash Memory — The P-Flash memory constitutes the main nonvolatile memory store for applications.
P-Flash Sector — The P-Flash sector is the smallest portion of the P-Flash memory that can be erased.
Each P-Flash sector contains 1024 bytes.
Program IFR — Nonvolatile information register located in the P-Flash block that contains the Device
ID, Version ID, and the Program Once field. The Program IFR is visible in the global memory map by
setting the PGMIFRON bit in the MMCCTL1 register.
26.1.2
26.1.2.1
26.1.2.2
Freescale Semiconductor
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384 Kbytes of P-Flash memory composed of one 256 Kbyte Flash block and one 128 Kbyte Flash
block. The 256 Kbyte Flash block consists of two 128 Kbyte sections each divided into 128 sectors
of 1024 bytes. The 128 Kbyte Flash block is divided into 128 sectors of 1024 bytes.
Single bit fault correction and double bit fault detection within a 64-bit phrase during read
operations
Automated program and erase algorithm with verify and generation of ECC parity bits
Fast sector erase and phrase program operation
Ability to program up to one phrase in each P-Flash block simultaneously
Flexible protection scheme to prevent accidental program or erase of P-Flash memory
Up to 32 Kbytes of D-Flash memory with 256 byte sectors for user access
Dedicated commands to control access to the D-Flash memory over EEE operation
Single bit fault correction and double bit fault detection within a word during read operations
Automated program and erase algorithm with verify and generation of ECC parity bits
Fast sector erase and word program operation
Ability to program up to four words in a burst sequence
Features
P-Flash Features
D-Flash Features
MC9S12XE-Family Reference Manual Rev. 1.25
Chapter 26 384 KByte Flash Module (S12XFTM384K2V1)
955
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