S912XET512J3VALR Freescale Semiconductor, S912XET512J3VALR Datasheet - Page 157

• Manufacturer Part Number: S912XET512J3VALR
• Description: 16-bit Microcontrollers - MCU 16 BIT,512K FLASH
• Manufacturer: Freescale Semiconductor

Specifications of S912XET512J3VALR

• Rohs: yes
• Core: HCS12X
• Processor Series: MC9S12XE
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 32 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-112
• Mounting Style: SMD/SMT

1. Read: Anytime.
2.3.73
Freescale Semiconductor
DDR1AD0
RDR0AD0
Address 0x0274
Write: Anytime.
Field
Field
Reset
7-0
7-0
W
R
RDR0AD07
Port AD0 data direction—
This register controls the data direction of pins 7 through 0.
1 Associated pin is configured as output.
0 Associated pin is configured as input.
Port AD0 reduced drive—Select reduced drive for Port AD0 outputs
This register configures the drive strength of Port AD0 output pins 15 through 8 as either full or reduced independent
of the function used on the pins. If a pin is used as input this bit has no effect.
1 Reduced drive selected (approx. 1/5 of the full drive strength).
0 Full drive strength enabled.
Port AD0 Reduced Drive Register 0 (RDR0AD0)
0
7
Due to internal synchronization circuits, it can take up to 2 bus clock cycles
until the correct value is read on PT0AD0 registers, when changing the
DDR1AD0 register.
To use the digital input function on Port AD0 the ATD Digital Input Enable
Register (ATD0DIEN1) has to be set to logic level “1”.
RDR0AD06
Figure 2-71. Port AD0 Reduced Drive Register 0 (RDR0AD0)
0
6
Table 2-68. DDR1AD0 Register Field Descriptions
Table 2-69. RDR0AD0 Register Field Descriptions
MC9S12XE-Family Reference Manual Rev. 1.25
RDR0AD05
0
5
RDR0AD04
NOTE
NOTE
0
4
Description
Description
RDR0AD03
3
0
Chapter 2 Port Integration Module (S12XEPIMV1)
RDR0AD02
0
2
RDR0AD01
Access: User read/write
0
1
RDR0AD00
0
0
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