S912XET512J3VALR Freescale Semiconductor, S912XET512J3VALR Datasheet - Page 622

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S912XET512J3VALR

Manufacturer Part Number
S912XET512J3VALR
Description
16-bit Microcontrollers - MCU 16 BIT,512K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XET512J3VALR

Rohs
yes
Core
HCS12X
Processor Series
MC9S12XE
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
32 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-112
Mounting Style
SMD/SMT

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
S912XET512J3VALR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Chapter 16 Freescale’s Scalable Controller Area Network (S12MSCANV3)
1. Read: Anytime
16.3.2.9
The CANTARQ register allows abort request of queued messages as described below.
1. Read: Anytime
622
Module Base + 0x0008
ABTRQ[2:0]
TXEIE[2:0]
Write: Anytime when not in initialization mode
Write: Anytime when not in initialization mode
Field
Field
2-0
2-0
Reset:
W
R
Transmitter Empty Interrupt Enable
0 No interrupt request is generated from this event.
1 A transmitter empty (transmit buffer available for transmission) event causes a transmitter empty interrupt
Abort Request — The CPU sets the ABTRQx bit to request that a scheduled message buffer (TXEx = 0) be
aborted. The MSCAN grants the request if the message has not already started transmission, or if the
transmission is not successful (lost arbitration or error). When a message is aborted, the associated TXE (see
Section 16.3.2.7, “MSCAN Transmitter Flag Register
Section 16.3.2.10, “MSCAN Transmitter Message Abort Acknowledge Register
transmit interrupt occurs if enabled. The CPU cannot reset ABTRQx. ABTRQx is reset whenever the associated
TXE flag is set.
0 No abort request
1 Abort request pending
Figure 16-12. MSCAN Transmitter Message Abort Request Register (CANTARQ)
MSCAN Transmitter Message Abort Request Register (CANTARQ)
request.
The CANTIER register is held in the reset state when the initialization mode
is active (INITRQ = 1 and INITAK = 1). This register is writable when not
in initialization mode (INITRQ = 0 and INITAK = 0).
The CANTARQ register is held in the reset state when the initialization
mode is active (INITRQ = 1 and INITAK = 1). This register is writable when
not in initialization mode (INITRQ = 0 and INITAK = 0).
0
0
7
= Unimplemented
Table 16-15. CANTARQ Register Field Descriptions
Table 16-14. CANTIER Register Field Descriptions
6
0
0
MC9S12XE-Family Reference Manual Rev. 1.25
0
0
5
NOTE
NOTE
4
0
0
Description
Description
(CANTFLG)”) and abort acknowledge flags (ABTAK, see
0
0
3
ABTRQ2
2
0
(CANTAAK)”) are set and a
Access: User read/write
ABTRQ1
Freescale Semiconductor
0
1
ABTRQ0
0
0
(1)

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