AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 71
AT91SAM7S32-AI
Manufacturer Part Number
AT91SAM7S32-AI
Description
AT91 ARM Thumb-based Microcontrollers
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT91SAM7S32-AI.pdf
(446 pages)
- Current page: 71 of 446
- Download datasheet (3Mb)
Watchdog Timer (WDT)
Overview
Block Diagram
Figure 26. Watchdog Timer Block Diagram
6071A–ATARM–28-Oct-04
WDT_CR
WDRSTT
read WDT_SR
or
reset
write WDT_MR
The Watchdog Timer can be used to prevent system lock-up if the software becomes trapped
in a deadlock. It features a 12-bit down counter that allows a watchdog period of up to 16 sec-
onds (slow clock at 32.768 kHz). It can generate a general reset or a processor reset only. In
addition, it can be stopped while the processor is in debug mode or idle mode.
WDT_MR
WDD
WDERR
<= WDD
set
reset
reload
WDT_MR
WV
12-bit Down
1
WDUNF
Counter
Current
Value
= 0
reset
set
0
AT91SAM7S32 Preliminary
1/128
reload
WDRSTEN
WDT_MR
WDT_MR
WDFIEN
SLCK
(to Reset Controlle
wdt_int
wdt_fault
r)
71
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